| Presentation | 2017-03-03 Hardware implementation of deep neural networks composed of self-organizing maps Yuichiro Tanaka, Hakaru Tamukoh, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this research, we aim to implement deep neural networks (DNNs) composed of self-organizing maps into field programmable gate arrays (FPGAs) to develop a recognition system which is high speed and low power consumption. Reductions of multipliers from DNNs are required since multipliers in FPGA are limited and DNNs includes a lot of multipliers. We propose a hardware oriented algorithm for a DNN composed of self-organizing maps which reduces multipliers from DNNs. In addition, we develop a hardware of the DNN using the proposed hardware oriented algorithm and show simulation results. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Deep Neural Networks / Deep Learning / Self-Organizing Maps / FPGA |
| Paper # | SIS2016-60 |
| Date of Issue | 2017-02-23 (SIS) |
| Conference Information | |
| Committee | SIS |
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| Conference Date | 2017/3/2(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kanagawa Inst. Tech. Yokohama Office |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Soft Computing, etc. |
| Chair | Hirokazu Tanaka(Hiroshima City Univ.) |
| Vice Chair | Takayuki Nakachi(NTT) / Noriaki Suetake(Yamaguchi Univ.) |
| Secretary | Takayuki Nakachi(Toshiba) / Noriaki Suetake(Kanagawa Inst. of Tech.) |
| Assistant | Hakaru Tamukoh(Kyushu Inst. of Tech.) / Masaaki Fujiyoshi(Tokyo Metropolitan Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Smart Info-Media Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware implementation of deep neural networks composed of self-organizing maps |
| Sub Title (in English) | |
| Keyword(1) | Deep Neural Networks |
| Keyword(2) | Deep Learning |
| Keyword(3) | Self-Organizing Maps |
| Keyword(4) | FPGA |
| 1st Author's Name | Yuichiro Tanaka |
| 1st Author's Affiliation | Kyushu Institute of Technology(KIT) |
| 2nd Author's Name | Hakaru Tamukoh |
| 2nd Author's Affiliation | Kyushu Institute of Technology(KIT) |
| Date | 2017-03-03 |
| Paper # | SIS2016-60 |
| Volume (vol) | vol.116 |
| Number (no) | SIS-482 |
| Page | pp.pp.101-106(SIS), |
| #Pages | 6 |
| Date of Issue | 2017-02-23 (SIS) |