| Presentation | 2017-03-02 MILP Approach to Skew-Aware High Level Synthesis Kai Shimura, Mineo Kaneko, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Intentional clock skew is known as one of the promising techniques for enhancing the circuit speed. However, when we try to apply the intentional skew to a datapath circuit for some specific application, the improvement of the operation speed achieved by the intentional skew depends on the operation schedule and the resource binding. Considering the need for skew aware high level synthesis, in this paper, we propose unified Mixed Integer Linear Programming (MILP) formulation which encompasses operation scheduling, resource binding and skew scheduling. Our formulation also includes several unique features such as variable cycle-length execution for operations, binding-dependent multiplexer belong, hold timing constraint considering exactly its binding-dependent activation condition, etc. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | clock skew-aware adjustment / high-level synthesis / multiplexer / Mixed Integer Linear Programming |
| Paper # | VLD2016-120 |
| Date of Issue | 2017-02-22 (VLD) |
| Conference Information | |
| Committee | VLD |
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| Conference Date | 2017/3/1(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Takashi Takenana(NEC) |
| Vice Chair | Hiroyuki Ochi(Ritsumeikan Univ.) |
| Secretary | Hiroyuki Ochi(Fujitsu Labs.) |
| Assistant | Parizy Matthieu(Fujitsu Labs.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | MILP Approach to Skew-Aware High Level Synthesis |
| Sub Title (in English) | |
| Keyword(1) | clock skew-aware adjustment |
| Keyword(2) | high-level synthesis |
| Keyword(3) | multiplexer |
| Keyword(4) | Mixed Integer Linear Programming |
| 1st Author's Name | Kai Shimura |
| 1st Author's Affiliation | Japan Advanced Institute of Science and Technology(JAIST) |
| 2nd Author's Name | Mineo Kaneko |
| 2nd Author's Affiliation | Japan Advanced Institute of Science and Technology(JAIST) |
| Date | 2017-03-02 |
| Paper # | VLD2016-120 |
| Volume (vol) | vol.116 |
| Number (no) | VLD-478 |
| Page | pp.pp.97-102(VLD), |
| #Pages | 6 |
| Date of Issue | 2017-02-22 (VLD) |