| Presentation | 2017-03-09 Approach to Direct Memory Access for Tamper Resistant System using Secure Processor Rihito Suzuki, Takuya Kajiwara, Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In an environment using secure processor to support secure program execution, because of its integrity check mechanism, DMA (Direct Memory Access) method can not be directly applied. In this paper, we discuss models and designs to realize DMA executed by trusted external devices, which offload IO operation from the processor and guarantee confidentiality / integrity of data. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | secure processors / encrypted computation / direct memory access |
| Paper # | CPSY2016-138,DC2016-84 |
| Date of Issue | 2017-03-02 (CPSY, DC) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2017/3/9(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kumejima Island |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | ETNET20167 |
| Chair | Yasuhiko Nakashima(NAIST) / Michiko Inoue(NAIST) / Kiyoharu Hamaguchi(Shimane Univ.) |
| Vice Chair | Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) |
| Secretary | Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Satoshi Fukumoto(Kyoto Sangyo Univ.) / (Tokyo Inst. of Tech.) / (Toshiba) / (Univ. of Kitakyushu) |
| Assistant | Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(Hokkaido Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Approach to Direct Memory Access for Tamper Resistant System using Secure Processor |
| Sub Title (in English) | |
| Keyword(1) | secure processors |
| Keyword(2) | encrypted computation |
| Keyword(3) | direct memory access |
| 1st Author's Name | Rihito Suzuki |
| 1st Author's Affiliation | The University of Tokyo(UTokyo) |
| 2nd Author's Name | Takuya Kajiwara |
| 2nd Author's Affiliation | The University of Tokyo(UTokyo) |
| 3rd Author's Name | Mizuki Miyanaga |
| 3rd Author's Affiliation | The University of Tokyo(UTokyo) |
| 4th Author's Name | Hidetsugu Irie |
| 4th Author's Affiliation | The University of Tokyo(UTokyo) |
| 5th Author's Name | Shuichi Sakai |
| 5th Author's Affiliation | The University of Tokyo(UTokyo) |
| Date | 2017-03-09 |
| Paper # | CPSY2016-138,DC2016-84 |
| Volume (vol) | vol.116 |
| Number (no) | CPSY-510,DC-511 |
| Page | pp.pp.39-44(CPSY), pp.39-44(DC), |
| #Pages | 6 |
| Date of Issue | 2017-03-02 (CPSY, DC) |