Presentation 2017-02-21
Design for Evaluation of TSV based Interconnections in 3D-SIC
Shuichi Kameyama, Senling Wang, Hiroshi Takahashi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper introduces a concept of Design for Evaluation (DFE) that is a design method to embed circuits for quality evaluation of products into LSIs and/or boards. As a specific example of the DFE, we introduce a precise analog measuring circuit and technic for the TSV based interconnection resistance of 3D stacked IC (3D-SIC). In addition, we report the evaluated results for the feasibility of the method based on an experiment and the placement and routing design.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Design for Evaluation / DFE / 3D-SIC / Interconnect / 1149.1 / Analog Boundary Scan
Paper # DC2016-83
Date of Issue 2017-02-14 (DC)

Conference Information
Committee DC
Conference Date 2017/2/21(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Kikai-Shinko-Kaikan Bldg.
Topics (in Japanese) (See Japanese page)
Topics (in English) VLSI Design and Test, etc
Chair Michiko Inoue(NAIST)
Vice Chair Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Secretary Satoshi Fukumoto(Kyoto Sangyo Univ.)
Assistant

Paper Information
Registration To Technical Committee on Dependable Computing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design for Evaluation of TSV based Interconnections in 3D-SIC
Sub Title (in English) Interconnection Resistance Evaluation with Analog Boundary Scan
Keyword(1) Design for Evaluation
Keyword(2) DFE
Keyword(3) 3D-SIC
Keyword(4) Interconnect
Keyword(5) 1149.1
Keyword(6) Analog Boundary Scan
1st Author's Name Shuichi Kameyama
1st Author's Affiliation Ehime University/Fujitsu Limited(Ehime Univ./Fujitsu)
2nd Author's Name Senling Wang
2nd Author's Affiliation Ehime University(Ehime Univ.)
3rd Author's Name Hiroshi Takahashi
3rd Author's Affiliation Ehime University(Ehime Univ.)
Date 2017-02-21
Paper # DC2016-83
Volume (vol) vol.116
Number (no) DC-466
Page pp.pp.53-58(DC),
#Pages 6
Date of Issue 2017-02-14 (DC)