| Presentation | 2017-02-21 A dynamic test compaction method on low power oriented test generation using capture safe test vectors Toshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In at-speed scan testing, capture power is a serious problem because the high power dissipation that can occur when the response for a test vector is captured by flip-flops results in circuit-damaging high temperature and timing errors, which may cause significant capture-induced yield loss. A low capture power test generation method based on fault simulation using capture safe test vectors in an initial test set was proposed to resolve a high capture power problem. In this paper, we propose a dynamic test compaction method on the low capture power test generation to reduce the number of capture-safe test vectors. In the dynamic test compaction, faults to satisfy the following conditions are selected as secondary faults. The conditions are that fault excitation cubes of secondary faults are compatible with that of a primary fault and secondary faults are located in fanout-free regions which are sensitized by a test vector for a primary fault. Experimental results show that the use of this method reduces the number of capture-safe test vectors by 18% on average. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | low power / test generation / captue-safe test vectors / dynamic test compaction |
| Paper # | DC2016-74 |
| Date of Issue | 2017-02-14 (DC) |
| Conference Information | |
| Committee | DC |
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| Conference Date | 2017/2/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | VLSI Design and Test, etc |
| Chair | Michiko Inoue(NAIST) |
| Vice Chair | Satoshi Fukumoto(Tokyo Metropolitan Univ.) |
| Secretary | Satoshi Fukumoto(Kyoto Sangyo Univ.) |
| Assistant | |
| Paper Information | |
| Registration To | Technical Committee on Dependable Computing |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A dynamic test compaction method on low power oriented test generation using capture safe test vectors |
| Sub Title (in English) | |
| Keyword(1) | low power |
| Keyword(2) | test generation |
| Keyword(3) | captue-safe test vectors |
| Keyword(4) | dynamic test compaction |
| 1st Author's Name | Toshinori Hosokawa |
| 1st Author's Affiliation | Nihon University(Nihon Univ.) |
| 2nd Author's Name | Atsushi Hirai |
| 2nd Author's Affiliation | Nihon University(Nihon Univ.) |
| 3rd Author's Name | Hiroshi Yamazaki |
| 3rd Author's Affiliation | Nihon University(Nihon Univ.) |
| 4th Author's Name | Masayuki Arai |
| 4th Author's Affiliation | Nihon University(Nihon Univ.) |
| Date | 2017-02-21 |
| Paper # | DC2016-74 |
| Volume (vol) | vol.116 |
| Number (no) | DC-466 |
| Page | pp.pp.1-6(DC), |
| #Pages | 6 |
| Date of Issue | 2017-02-14 (DC) |