Presentation 2017-02-21
Built-In Self Diagnosis Architecture for Logic Design
Keisuke Kagawa, Fumiya Yano, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Satoshi Ohtake,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Recently, roles of automotive LSI to realize a functional safety of vehicle are increasing. In order to guarantee the functional safety, developing the component technologies for Power On Self Test (POST) to test the vehicle system in the field is desirable. For POST, Built-In Self Test technologies that can achieve the specificed/expect fault coverage with limited patterns are developing. Moreover, it is believed that a Built-In Self Diagnosis (BISD) technology for POST that can not only detect faults but also locate the faults will be crucial to ensure the long-term functional safety. In this paper, we indictate the problems that have to be solved for BISD, and propose a new BISD architecture. In the proposed architecture, it can not only detect faults on the CUT but also indicate fault candidates from a prestored faults index. For this purpose, we introduce a new diagnostic signature generator and the circuit to indicate the fault candidate based on the diagnostic signatures. Finally, we evaluate the relationships between the compression of diagnostic signature/suspected fault signature and fault diagnosis capability.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Built-In Self Diagnosis / diagnostic signature / fault diagnosis capability
Paper # DC2016-76
Date of Issue 2017-02-14 (DC)

Conference Information
Committee DC
Conference Date 2017/2/21(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Kikai-Shinko-Kaikan Bldg.
Topics (in Japanese) (See Japanese page)
Topics (in English) VLSI Design and Test, etc
Chair Michiko Inoue(NAIST)
Vice Chair Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Secretary Satoshi Fukumoto(Kyoto Sangyo Univ.)
Assistant

Paper Information
Registration To Technical Committee on Dependable Computing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Built-In Self Diagnosis Architecture for Logic Design
Sub Title (in English)
Keyword(1) Built-In Self Diagnosis
Keyword(2) diagnostic signature
Keyword(3) fault diagnosis capability
1st Author's Name Keisuke Kagawa
1st Author's Affiliation Ehime University(Ehime Univ.)
2nd Author's Name Fumiya Yano
2nd Author's Affiliation Ehime University(Ehime Univ.)
3rd Author's Name Senling Wang
3rd Author's Affiliation Ehime University(Ehime Univ.)
4th Author's Name Yoshinobu Higami
4th Author's Affiliation Ehime University(Ehime Univ.)
5th Author's Name Hiroshi Takahashi
5th Author's Affiliation Ehime University(Ehime Univ.)
6th Author's Name Satoshi Ohtake
6th Author's Affiliation Oita University(Oita Univ.)
Date 2017-02-21
Paper # DC2016-76
Volume (vol) vol.116
Number (no) DC-466
Page pp.pp.11-16(DC),
#Pages 6
Date of Issue 2017-02-14 (DC)