Presentation | 2016-12-15 56-Level Programmable Voltage Detector in Steps of 50mV for Battery Management Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management applications, PVD’s with fine voltage resolution (<±1% of battery voltage) are required to precisely control the charging and discharging of the battery and to provide a universal voltage detector. The proposed fine voltage-step subtraction (FVS) method in PVD enables the wide detection voltage (VDETECT) range from 1.88V to 4.67V, fine VDETECT resolution of 50mV, and the 56-level linear programmability. Compared with previous publications, the 50-mV resolution is the smallest and the 56-level programmability is the largest. The programmability of VDETECT enables a VDETECT hopping capability achieving time-varying VDETECT to reduce the number of voltage detectors in the battery management system. PVD fabricated in 5V, 250-nm CMOS process shows the measured power consumption of 13nW at 3.5V and the temperature coefficient of 0.17mV/°C in -20°C to 80°C. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Voltage detector / Battery management / Field programmability |
Paper # | ICD2016-51,CPSY2016-57 |
Date of Issue | 2016-12-08 (ICD, CPSY) |
Conference Information | |
Committee | ICD / CPSY |
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Conference Date | 2016/12/15(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Tokyo Institute of Technology |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | Minoru Fujishima(Hiroshima Univ.) / Yasuhiko Nakashima(NAIST) |
Vice Chair | Hideto Hidaka(Renesas) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) |
Secretary | Hideto Hidaka(Hiroshima Univ.) / Koji Nakano(Univ. of Tokyo) / Hidetsugu Irie(Fujitsu Labs.) |
Assistant | Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(Hokkaido Univ.) |
Paper Information | |
Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Computer Systems |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | 56-Level Programmable Voltage Detector in Steps of 50mV for Battery Management |
Sub Title (in English) | |
Keyword(1) | Voltage detector |
Keyword(2) | Battery management |
Keyword(3) | Field programmability |
1st Author's Name | Teruki Someya |
1st Author's Affiliation | University of Tokyo(Univ. of Tokyo) |
2nd Author's Name | Kenichi Matsunaga |
2nd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
3rd Author's Name | Hiroki Morimura |
3rd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
4th Author's Name | Takayasu Sakurai |
4th Author's Affiliation | University of Tokyo(Univ. of Tokyo) |
5th Author's Name | Makoto Takamiya |
5th Author's Affiliation | University of Tokyo(Univ. of Tokyo) |
Date | 2016-12-15 |
Paper # | ICD2016-51,CPSY2016-57 |
Volume (vol) | vol.116 |
Number (no) | ICD-364,CPSY-365 |
Page | pp.pp.1-5(ICD), pp.1-5(CPSY), |
#Pages | 5 |
Date of Issue | 2016-12-08 (ICD, CPSY) |