| Presentation | 2016-12-15 [Poster Presentation] Study of the capacitor ratio adjustment method that takes into account the parasitic capacitance of MOS switch in Capacitor-DAC Yoshiharu Miyake, Masahiro Sasaki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, C-DAC (Capacitor Digital to Analog Converter) is often used as a reference voltage source in a successive approximation ADC (Analog to Digital Converter). In general, a C-DAC consists of a MOS switch and a group of capacitors with binary weighted capacitance values. However, the parasitic capacitance that causes an error in the capacitance ratio, and therefore it is necessary to readjust the capacitors’ value one by one from the simulation results. In this study, we analyze the relationship between the W/L ratio of the MOS switch and the capacitance ratio after the adjustment. And then by calculating the coefficient of the relationship, the comprehensive adjustment method of the C-DAC capacitance ratio that considers the parasitic component of the MOS switch will be examined. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | C-DAC / Parasitic capacitance |
| Paper # | ICD2016-63,CPSY2016-69 |
| Date of Issue | 2016-12-08 (ICD, CPSY) |
| Conference Information | |
| Committee | ICD / CPSY |
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| Conference Date | 2016/12/15(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Tokyo Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Minoru Fujishima(Hiroshima Univ.) / Yasuhiko Nakashima(NAIST) |
| Vice Chair | Hideto Hidaka(Renesas) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) |
| Secretary | Hideto Hidaka(Hiroshima Univ.) / Koji Nakano(Univ. of Tokyo) / Hidetsugu Irie(Fujitsu Labs.) |
| Assistant | Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(Hokkaido Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Computer Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Poster Presentation] Study of the capacitor ratio adjustment method that takes into account the parasitic capacitance of MOS switch in Capacitor-DAC |
| Sub Title (in English) | |
| Keyword(1) | C-DAC |
| Keyword(2) | Parasitic capacitance |
| 1st Author's Name | Yoshiharu Miyake |
| 1st Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 2nd Author's Name | Masahiro Sasaki |
| 2nd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| Date | 2016-12-15 |
| Paper # | ICD2016-63,CPSY2016-69 |
| Volume (vol) | vol.116 |
| Number (no) | ICD-364,CPSY-365 |
| Page | pp.pp.45-45(ICD), pp.45-45(CPSY), |
| #Pages | 1 |
| Date of Issue | 2016-12-08 (ICD, CPSY) |