Presentation 2016-12-12
Research of capacitor-type synapses in the hardware of the neural network
Koki Watada, Hiroki Nakanishi, Mutsumi Kimura, Tokiyoshi Matsuda,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) We are studying capacitor type synapses for the purpose of reducing power consumption when hardware of neural networks are made. We conducted a learning experiment of arbitrary logic with a trimmer capacitors and confirmed the operation of learning and recalling AND logic, OR logic, XOR logic. We developed a cross-point type devices using IGZO thin films which are fabricated using a low-temperature process and have high mobility among thin film materials that can be highly integrated, and we confirmed its possibility as a highly integrated synapse elements with much improved element integration.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Cellular Neural Network / FPGA / Variable Capacitor / Neuron / Synapse
Paper # EID2016-28,SDM2016-109
Date of Issue 2016-12-05 (EID, SDM)

Conference Information
Committee SDM / EID
Conference Date 2016/12/12(1days)
Place (in Japanese) (See Japanese page)
Place (in English) NAIST
Topics (in Japanese) (See Japanese page)
Topics (in English) Fabrication and Evaluation of Silicon Related Materials
Chair Tatsuya Kunikiyo(Renesas) / Tomokazu Shiga(Univ. of Electro-Comm.)
Vice Chair Takahiro Shinada(Tohoku Univ.) / Mutsumi Kimura(Ryukoku Univ.) / Yuko Kominami(Shizuoka Univ.)
Secretary Takahiro Shinada(Tohoku Univ.) / Mutsumi Kimura(Renesas) / Yuko Kominami(NTT)
Assistant Hiroya Ikeda(Shizuoka Univ.) / Rumiko Yamaguchi(Akita Univ.) / Hiroyuki Nitta(Japan Display) / Mitsuru Nakata(NHK) / Takashi Kojiri(ZEON) / Ryosuke Nonaka(Toshiba)

Paper Information
Registration To Technical Committee on Silicon Device and Materials / Technical Committee on Electronic Information Displays
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Research of capacitor-type synapses in the hardware of the neural network
Sub Title (in English)
Keyword(1) Cellular Neural Network
Keyword(2) FPGA
Keyword(3) Variable Capacitor
Keyword(4) Neuron
Keyword(5) Synapse
1st Author's Name Koki Watada
1st Author's Affiliation Ryukoku University(Ryukoku Univ.)
2nd Author's Name Hiroki Nakanishi
2nd Author's Affiliation Ryukoku University(Ryukoku Univ.)
3rd Author's Name Mutsumi Kimura
3rd Author's Affiliation Ryukoku University(Ryukoku Univ.)
4th Author's Name Tokiyoshi Matsuda
4th Author's Affiliation Ryukoku University(Ryukoku Univ.)
Date 2016-12-12
Paper # EID2016-28,SDM2016-109
Volume (vol) vol.116
Number (no) EID-354,SDM-355
Page pp.pp.85-88(EID), pp.85-88(SDM),
#Pages 4
Date of Issue 2016-12-05 (EID, SDM)