| Presentation | 2016-11-25 Formal Description of Synchronization by Functional Definition of Synchronous Circuits Shunji Nishimura, Motoki Amagasaki, Toshinori Sueyoshi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Synchronous circuits are usually defined as D-Flipflop (D-FF) synchronized circuits, but it is doubtful that D-FF completely represents the concept of synchronous. In other words, the conventional definition of synchronous circuits is not at a conceptual level, thus there must be some better definitions especially from a theoretical point of view. In this paper, we propose a novel definition of synchronous circuits. The definition is not on a structural expression of circuits, but on a functional expression. The contribution of this paper is to provide a better understanding about conventional synchronous circuits and also entire sequential circuits. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | synchronous circuits / multiple clock / formal definition |
| Paper # | CAS2016-73,MSS2016-53 |
| Date of Issue | 2016-11-17 (CAS, MSS) |
| Conference Information | |
| Committee | MSS / CAS / IPSJ-AL |
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| Conference Date | 2016/11/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kobe Institute of Computing |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Satoshi Yamane(Kanazawa Univ.) / Toshihiko Takahashi(Niigata Univ.) |
| Vice Chair | Morikazu Nakamura(Univ. of Ryukyus) / Mitsuru Hiraki(Renesas) |
| Secretary | Morikazu Nakamura(Yamaguchi Univ.) / Mitsuru Hiraki(Toshiba) / (Tohoku Univ.) |
| Assistant | Hideki Kinjo(Okinawa Univ.) / Toshihiro Tachibana(Shonan Inst. of Tech.) / Yohei Nakamura(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Mathematical Systems Science and its applications / Technical Committee on Circuits and Systems / Special Interest Group on Algorithms |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Formal Description of Synchronization by Functional Definition of Synchronous Circuits |
| Sub Title (in English) | |
| Keyword(1) | synchronous circuits |
| Keyword(2) | multiple clock |
| Keyword(3) | formal definition |
| 1st Author's Name | Shunji Nishimura |
| 1st Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 2nd Author's Name | Motoki Amagasaki |
| 2nd Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 3rd Author's Name | Toshinori Sueyoshi |
| 3rd Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| Date | 2016-11-25 |
| Paper # | CAS2016-73,MSS2016-53 |
| Volume (vol) | vol.116 |
| Number (no) | CAS-315,MSS-316 |
| Page | pp.pp.99-104(CAS), pp.99-104(MSS), |
| #Pages | 6 |
| Date of Issue | 2016-11-17 (CAS, MSS) |