Presentation 2016-11-28
A Design Method of Circuits to Generate Stochastic Numbers with the Minimum Inputs
Ritsuko Muguruma, Shigeru Yamashita,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Stochastic Computing (SC) is an unconventional calculation method using Stochastic Numbers (SNs) which are bit-streams representing numbers with the probabilities of being 1. Recently, many design methods for SC circuits have been proposed. Among them, there has been proposed a general design method to realize an SC operation by designing a Boolean circuit whose output becomes one with a certain desired probability. The method needs many inputs to produce precise SNs; the circuit area may become large by the method. In this paper, we propose a new method to generate SNs. Our method can reduce the number of inputs by using a different probability for each input. Moreover, our method can fi nd the minimum number of random inputs to generate target SNs, and design an SC circuit with small area.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Stochastic Computing / Stochastic Number
Paper # VLD2016-44,DC2016-38
Date of Issue 2016-11-21 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE
Conference Date 2016/11/28(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Ritsumeikan University, Osaka Ibaraki Campus
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2016 -New Field of VLSI Design-
Chair Takashi Takenana(NEC) / Michiko Inoue(NAIST) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Satoru Noge(Numazu National College of Tech.) / Minoru Fujishima(Hiroshima Univ.) / Seishi Takamura(NTT)
Vice Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Atsuro Ichigaya(NHK)
Secretary Hiroyuki Ochi(Fujitsu Labs.) / Satoshi Fukumoto(Hiroshima City Univ.) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Masato Motomura(Fujitsu Labs.) / Yuichiro Shibata(NII) / Fumihiko Hirose(Univ. of Tsukuba) / Hideto Hidaka(Hiroshima City Univ.) / Takayuki Hamamoto(NTT) / Atsuro Ichigaya(Nihon Univ.)
Assistant Parizy Matthieu(Fujitsu Labs.) / / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(NAIST) / Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) / Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Kei Kawamura(KDDI R&D Labs.) / Keita Takahashi(Nagoya Univ.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Design Method of Circuits to Generate Stochastic Numbers with the Minimum Inputs
Sub Title (in English)
Keyword(1) Stochastic Computing
Keyword(2) Stochastic Number
1st Author's Name Ritsuko Muguruma
1st Author's Affiliation Ritsumeikan University(Ritsmeikan Univ.)
2nd Author's Name Shigeru Yamashita
2nd Author's Affiliation Ritsumeikan University(Ritsmeikan Univ.)
Date 2016-11-28
Paper # VLD2016-44,DC2016-38
Volume (vol) vol.116
Number (no) VLD-330,DC-331
Page pp.pp.1-6(VLD), pp.1-6(DC),
#Pages 6
Date of Issue 2016-11-21 (VLD, DC)