Presentation | 2016-11-28 A Novel Merge Network for FPGA Sorting Accelerators Makoto Saitoh, Susumu Mashimo, Thiem Van Chu, Kenji Kise, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | |
Paper # | RECONF2016-42 |
Date of Issue | 2016-11-21 (RECONF) |
Conference Information | |
Committee | VLD / DC / CPSY / RECONF / CPM / ICD / IE |
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Conference Date | 2016/11/28(3days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Ritsumeikan University, Osaka Ibaraki Campus |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | Design Gaia 2016 -New Field of VLSI Design- |
Chair | Takashi Takenana(NEC) / Michiko Inoue(NAIST) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Satoru Noge(Numazu National College of Tech.) / Minoru Fujishima(Hiroshima Univ.) / Seishi Takamura(NTT) |
Vice Chair | Hiroyuki Ochi(Ritsumeikan Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Atsuro Ichigaya(NHK) |
Secretary | Hiroyuki Ochi(Fujitsu Labs.) / Satoshi Fukumoto(Hiroshima City Univ.) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Masato Motomura(Fujitsu Labs.) / Yuichiro Shibata(NII) / Fumihiko Hirose(Univ. of Tsukuba) / Hideto Hidaka(Hiroshima City Univ.) / Takayuki Hamamoto(NTT) / Atsuro Ichigaya(Nihon Univ.) |
Assistant | Parizy Matthieu(Fujitsu Labs.) / / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(NAIST) / Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) / Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Kei Kawamura(KDDI R&D Labs.) / Keita Takahashi(Nagoya Univ.) |
Paper Information | |
Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Novel Merge Network for FPGA Sorting Accelerators |
Sub Title (in English) | |
Keyword(1) | |
1st Author's Name | Makoto Saitoh |
1st Author's Affiliation | Tokyo Institute of Technology(Tokyotech) |
2nd Author's Name | Susumu Mashimo |
2nd Author's Affiliation | Tokyo Institute of Technology(Tokyotech) |
3rd Author's Name | Thiem Van Chu |
3rd Author's Affiliation | Tokyo Institute of Technology(Tokyotech) |
4th Author's Name | Kenji Kise |
4th Author's Affiliation | Tokyo Institute of Technology(Tokyotech) |
Date | 2016-11-28 |
Paper # | RECONF2016-42 |
Volume (vol) | vol.116 |
Number (no) | RECONF-332 |
Page | pp.pp.13-18(RECONF), |
#Pages | 6 |
Date of Issue | 2016-11-21 (RECONF) |