Presentation 2016-11-28
2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting
Tomoya Kimura, Hiroyuki ochi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This report proposes L1L5-type 2-step charge pump circuit that is suitable for boosting efficiently the subthreshold input voltage obtained by on-chip solar cell to high voltage around 4V. Conventional cross-coupled charge pump needs 10 stages to obtain 4V output even if 40 pF capacitors are allowed, and its 800 pF capacitance in total occupies large amount of chip area, which poses difficulty in implementing it on the same chip with solar cells. The proposed circuit consists of the first-step charge pump that boosts the subthreshold-level input voltage to superthreshold-level and the second-step charge pump that generates even higher voltage using the clock of superthreshold-level voltage swing. Under the constraints of 100 pF total capacitance, we compared the power efficiency of our circuit with the conventional cross-coupled charge pump using circuit simulation with 0.18$mu$m CMOS technology model, and observed that the proposed circuit achieves 46.4% power efficiency at 4V output voltage, which is 5.2% higher than the conventional cross-coupled charge pump.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Micro Energy Harvesting / Voltage Booster Circuit / Ultra Low Power / Subthreshold Circuit
Paper # VLD2016-46,DC2016-40
Date of Issue 2016-11-21 (VLD, DC)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE
Conference Date 2016/11/28(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Ritsumeikan University, Osaka Ibaraki Campus
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2016 -New Field of VLSI Design-
Chair Takashi Takenana(NEC) / Michiko Inoue(NAIST) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Satoru Noge(Numazu National College of Tech.) / Minoru Fujishima(Hiroshima Univ.) / Seishi Takamura(NTT)
Vice Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Atsuro Ichigaya(NHK)
Secretary Hiroyuki Ochi(Fujitsu Labs.) / Satoshi Fukumoto(Hiroshima City Univ.) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Masato Motomura(Fujitsu Labs.) / Yuichiro Shibata(NII) / Fumihiko Hirose(Univ. of Tsukuba) / Hideto Hidaka(Hiroshima City Univ.) / Takayuki Hamamoto(NTT) / Atsuro Ichigaya(Nihon Univ.)
Assistant Parizy Matthieu(Fujitsu Labs.) / / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(NAIST) / Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) / Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Kei Kawamura(KDDI R&D Labs.) / Keita Takahashi(Nagoya Univ.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) 2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting
Sub Title (in English)
Keyword(1) Micro Energy Harvesting
Keyword(2) Voltage Booster Circuit
Keyword(3) Ultra Low Power
Keyword(4) Subthreshold Circuit
1st Author's Name Tomoya Kimura
1st Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
2nd Author's Name Hiroyuki ochi
2nd Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
Date 2016-11-28
Paper # VLD2016-46,DC2016-40
Volume (vol) vol.116
Number (no) VLD-330,DC-331
Page pp.pp.13-18(VLD), pp.13-18(DC),
#Pages 6
Date of Issue 2016-11-21 (VLD, DC)