| Presentation | 2016-11-28 Evaluation of Radiation-Hard Circuit Structures in a FDSOI Process by TCAD Simulations Kodai Yamada, Haruki Maruoka, Shigehiro Umehara, Jun Furuta, Kazutoshi Kobayashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | According to the Moore's law, LSIs are miniaturized and the reliability of LSIs is degraded. To improve the tolerance ofFFs against soft errors, several redundant FFs are effective countermeasures. However, redundant FFs have large area, delay and power overheads. Non-redundant FF structures with higher soft-error resilience are needed. In this paper, we evaluate non-redundant FF structures in an FDSOI process to prevent soft errors. We evaluate soft error rates of latches with additional components such as capacitors or PMOS pass-transistors by TCAD simulations. Even by a particle hit with LET of 60 mev, the stored value of the latch with PMOS pass-transistors is not upset. Thus, the latch has enough tolerance to use even if in outer space. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Soft error / TCAD simulations / FDSOI / Radiation-hardened latch / Pass-transistor |
| Paper # | VLD2016-49,DC2016-43 |
| Date of Issue | 2016-11-21 (VLD, DC) |
| Conference Information | |
| Committee | VLD / DC / CPSY / RECONF / CPM / ICD / IE |
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| Conference Date | 2016/11/28(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Ritsumeikan University, Osaka Ibaraki Campus |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2016 -New Field of VLSI Design- |
| Chair | Takashi Takenana(NEC) / Michiko Inoue(NAIST) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Satoru Noge(Numazu National College of Tech.) / Minoru Fujishima(Hiroshima Univ.) / Seishi Takamura(NTT) |
| Vice Chair | Hiroyuki Ochi(Ritsumeikan Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Atsuro Ichigaya(NHK) |
| Secretary | Hiroyuki Ochi(Fujitsu Labs.) / Satoshi Fukumoto(Hiroshima City Univ.) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Tokyo Inst. of Tech.) / Masato Motomura(Fujitsu Labs.) / Yuichiro Shibata(NII) / Fumihiko Hirose(Univ. of Tsukuba) / Hideto Hidaka(Hiroshima City Univ.) / Takayuki Hamamoto(NTT) / Atsuro Ichigaya(Nihon Univ.) |
| Assistant | Parizy Matthieu(Fujitsu Labs.) / / Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(NAIST) / Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) / Takashi Hashimoto(Panasonic) / Masanori Natsui(Tohoku Univ.) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Kei Kawamura(KDDI R&D Labs.) / Keita Takahashi(Nagoya Univ.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Evaluation of Radiation-Hard Circuit Structures in a FDSOI Process by TCAD Simulations |
| Sub Title (in English) | |
| Keyword(1) | Soft error |
| Keyword(2) | TCAD simulations |
| Keyword(3) | FDSOI |
| Keyword(4) | Radiation-hardened latch |
| Keyword(5) | Pass-transistor |
| 1st Author's Name | Kodai Yamada |
| 1st Author's Affiliation | Kyoto Institute of Technology(KIT) |
| 2nd Author's Name | Haruki Maruoka |
| 2nd Author's Affiliation | Kyoto Institute of Technology(KIT) |
| 3rd Author's Name | Shigehiro Umehara |
| 3rd Author's Affiliation | Kyoto Institute of Technology(KIT) |
| 4th Author's Name | Jun Furuta |
| 4th Author's Affiliation | Kyoto Institute of Technology(KIT) |
| 5th Author's Name | Kazutoshi Kobayashi |
| 5th Author's Affiliation | Kyoto Institute of Technology(KIT) |
| Date | 2016-11-28 |
| Paper # | VLD2016-49,DC2016-43 |
| Volume (vol) | vol.116 |
| Number (no) | VLD-330,DC-331 |
| Page | pp.pp.31-36(VLD), pp.31-36(DC), |
| #Pages | 6 |
| Date of Issue | 2016-11-21 (VLD, DC) |