| Presentation | 2016-09-06 [Invited Talk] Accelerating an IoT Application by using CPU-FPGA tightly coupled architecture Yuki Kobayashi, Yoshikazu Watanabe, Seiya Shibata, Takashi Takenaka, Takeo Hosomi, Yuichi Nakamura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | CPU-FPGA tightly coupled architecture is an emerging architecture where FPGA is tightly coupled with CPU. We introduce an acceleration method that exploits the CPU-FPGA tightly coupled architecture. The advantages of such CPU-FPGA tightly coupled architecture include a broadband interconnect for the main memory space shared by CPU and FPGA. However, it requires careful design of both hardware and software to fully exploit the potential communication performance of the architecture. We developed a data packing technique to improve the efficiency of communication, and communication scheme that utilizes ring queues. We applied the developed techniques to an IoT application that performs the high-accuracy analysis of real world and confirmed that they are effective for accelerating the kernel function of the application. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / CPU-FPGA tightly coupled architecture / IoT / Ring-queue |
| Paper # | RECONF2016-32 |
| Date of Issue | 2016-08-29 (RECONF) |
| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2016/9/5(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Univ. of Toyama |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Chair | Minoru Watanabe(Shizuoka Univ.) |
| Vice Chair | Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Masato Motomura(Univ. of Tsukuba) / Yuichiro Shibata(Hiroshima City Univ.) |
| Assistant | Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Invited Talk] Accelerating an IoT Application by using CPU-FPGA tightly coupled architecture |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | CPU-FPGA tightly coupled architecture |
| Keyword(3) | IoT |
| Keyword(4) | Ring-queue |
| 1st Author's Name | Yuki Kobayashi |
| 1st Author's Affiliation | NEC Corporation(NEC) |
| 2nd Author's Name | Yoshikazu Watanabe |
| 2nd Author's Affiliation | NEC Corporation(NEC) |
| 3rd Author's Name | Seiya Shibata |
| 3rd Author's Affiliation | NEC Corporation(NEC) |
| 4th Author's Name | Takashi Takenaka |
| 4th Author's Affiliation | NEC Corporation(NEC) |
| 5th Author's Name | Takeo Hosomi |
| 5th Author's Affiliation | NEC Corporation(NEC) |
| 6th Author's Name | Yuichi Nakamura |
| 6th Author's Affiliation | NEC Corporation(NEC) |
| Date | 2016-09-06 |
| Paper # | RECONF2016-32 |
| Volume (vol) | vol.116 |
| Number (no) | RECONF-210 |
| Page | pp.pp.37-37(RECONF), |
| #Pages | 1 |
| Date of Issue | 2016-08-29 (RECONF) |