| Presentation | 2016-09-06 A Study of Methodology and Tools for Open-source FPGA Accelerators Takuya Nakamichi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Today's information and communication society requires more and higher-performance computing devices with the constraint of lower power consumption. Recent studies reveal efficiency of hardware accelerators implemented on Field-programmable gate array (FPGA). However, HW/SW co-design is still difficult because of the gap between hardware and software development methods. Therefore, we have proposed a heterogeneous computing oriented development environment named hCODE. FPGA accelerators is shared by the hCODE repository. In this paper, we propose methodology and tools to use the open-source accelerators and show that the accelerators can be easily integrated with the software. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / HW/SW Co-design / Open-source Accelerator |
| Paper # | RECONF2016-34 |
| Date of Issue | 2016-08-29 (RECONF) |
| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2016/9/5(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Univ. of Toyama |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Chair | Minoru Watanabe(Shizuoka Univ.) |
| Vice Chair | Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Masato Motomura(Univ. of Tsukuba) / Yuichiro Shibata(Hiroshima City Univ.) |
| Assistant | Takefumi Miyoshi(e-trees.Japan) / Yuuki Kobayashi(NEC) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study of Methodology and Tools for Open-source FPGA Accelerators |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | HW/SW Co-design |
| Keyword(3) | Open-source Accelerator |
| 1st Author's Name | Takuya Nakamichi |
| 1st Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 2nd Author's Name | Qian Zhao |
| 2nd Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 3rd Author's Name | Motoki Amagasaki |
| 3rd Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 4th Author's Name | Masahiro Iida |
| 4th Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 5th Author's Name | Morihiro Kuga |
| 5th Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| 6th Author's Name | Toshinori Sueyoshi |
| 6th Author's Affiliation | Kumamoto University(Kumamoto Univ.) |
| Date | 2016-09-06 |
| Paper # | RECONF2016-34 |
| Volume (vol) | vol.116 |
| Number (no) | RECONF-210 |
| Page | pp.pp.45-50(RECONF), |
| #Pages | 6 |
| Date of Issue | 2016-08-29 (RECONF) |