Presentation 2016-09-16
Impedance Balance Method Applicable to Asymmetric Switching Circuits for Reducing Common-Mode Noise
Taiki Nishimoto, Akira Minegishi, Masahiro Yamaoka, Kazuyuki Sakiyama, Toru Yamada, Tohlu Matsushima, Osami Wada,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This report presents a novel circuit design for suppressing conducted common-mode noise in boost converters. We have derived an impedance-balance equation for reduction of the noise from switching devises by applying a bridge-shaped equivalent circuit to the converter. To obtain wide operating frequency range, each output terminal is connected to the circuit ground via a series circuit consisting of a capacitor and an inductor. This can provide suppression of the common-mode noise, which is caused by switching of the transistor and the diode. The EMI reduction of up to 20 dB has been obtained in the range of 1 MHz to 20 MHz with a test board.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Boost Converter / Impedance Balance / EMC / Common Mode Noise
Paper # EMCJ2016-51
Date of Issue 2016-09-09 (EMCJ)

Conference Information
Committee EMCJ
Conference Date 2016/9/16(1days)
Place (in Japanese) (See Japanese page)
Place (in English) University of Hyogo
Topics (in Japanese) (See Japanese page)
Topics (in English) Absorber, Shield, EMC
Chair Hideaki Sone(Tohoku Univ.)
Vice Chair Osami Wada(Kyoto Univ.)
Secretary Osami Wada(AIST)
Assistant Yoshiki Kayano(Univ. of Electro-Comm.) / Yusaku Katsube(Hitachi) / Chie Sasaki(Panasonic)

Paper Information
Registration To Technical Committee on Electromagnetic Compatibility
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Impedance Balance Method Applicable to Asymmetric Switching Circuits for Reducing Common-Mode Noise
Sub Title (in English)
Keyword(1) Boost Converter
Keyword(2) Impedance Balance
Keyword(3) EMC
Keyword(4) Common Mode Noise
1st Author's Name Taiki Nishimoto
1st Author's Affiliation Panasonic Corporation(Panasonic)
2nd Author's Name Akira Minegishi
2nd Author's Affiliation Panasonic Corporation(Panasonic)
3rd Author's Name Masahiro Yamaoka
3rd Author's Affiliation Panasonic Corporation(Panasonic)
4th Author's Name Kazuyuki Sakiyama
4th Author's Affiliation Panasonic Corporation(Panasonic)
5th Author's Name Toru Yamada
5th Author's Affiliation Panasonic Corporation(Panasonic)
6th Author's Name Tohlu Matsushima
6th Author's Affiliation Kyoto University(Kyoto Univ.)
7th Author's Name Osami Wada
7th Author's Affiliation Kyoto University(Kyoto Univ.)
Date 2016-09-16
Paper # EMCJ2016-51
Volume (vol) vol.116
Number (no) EMCJ-223
Page pp.pp.7-12(EMCJ),
#Pages 6
Date of Issue 2016-09-09 (EMCJ)