Presentation 2016-09-01
[Tutorial Lecture] Implementation to FPGA of Image processing filter
Tomoaki Kimura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Video signal which is Full-HD, 4K UHD and 8K UHD is very high speed signal, the image processing filter is used for the filter technology of these signal. However, CPU is difficult for processing the image processing filter of video signal on real time. Therefore, it is required to make the image processing filter of video signal into hardware. For this reason, FPGA is used for implementation of hardware. We proposed some image processing filter algorithm, and these algorithm were implemented in FPGA. As a consequence, these FPGA’s hardware was applicable to the video signal without problem.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Image Processing / Video Signal / FPGA / Hardware implementation / Fuzzy inference
Paper # SIS2016-20
Date of Issue 2016-08-25 (SIS)

Conference Information
Committee SIS / IPSJ-AVM
Conference Date 2016/9/1(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Osaka Electro-Communication Univ.
Topics (in Japanese) (See Japanese page)
Topics (in English) Knowledge Multimedia Systems, etc.
Chair Hirokazu Tanaka(Hiroshima City Univ.) / Harumi Kawamura(*)
Vice Chair Takayuki Nakachi(NTT) / Noriaki Suetake(Yamaguchi Univ.)
Secretary Takayuki Nakachi(Toshiba) / Noriaki Suetake(Kanagawa Inst. of Tech.) / (KDDI R&D Labs.)
Assistant Hakaru Tamukoh(Kyushu Inst. of Tech.) / Masaaki Fujiyoshi(Tokyo Metropolitan Univ.)

Paper Information
Registration To Technical Committee on Smart Info-Media Systems / Special Interest Group on Audio Visual and Multimedia Information Processing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Tutorial Lecture] Implementation to FPGA of Image processing filter
Sub Title (in English)
Keyword(1) Image Processing
Keyword(2) Video Signal
Keyword(3) FPGA
Keyword(4) Hardware implementation
Keyword(5) Fuzzy inference
1st Author's Name Tomoaki Kimura
1st Author's Affiliation Kanagawa Institute of Technology(Kanagawa Institute of Tech.)
Date 2016-09-01
Paper # SIS2016-20
Volume (vol) vol.116
Number (no) SIS-204
Page pp.pp.21-26(SIS),
#Pages 6
Date of Issue 2016-08-25 (SIS)