| Presentation | 2016-08-25 Study of Digital Multiplier Algorithms Using a Square Law Its FPGA implementation Shu Sasaki, Haruo Kobayashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | |
| Paper # | SIP2016-75 |
| Date of Issue | 2016-08-18 (SIP) |
| Conference Information | |
| Committee | SIP |
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| Conference Date | 2016/8/25(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Chiba Institute of Technology, Tsudanuma Campus |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Fundamental theory, machine learning, and signal processing |
| Chair | Makoto Nakashizuka(Chiba Inst. of Tech.) |
| Vice Chair | Masahiro Okuda(Univ. of Kitakyushu) / Shogo Muramatsu(Niigata Univ.) |
| Secretary | Masahiro Okuda(Ritsumeikan Univ.) / Shogo Muramatsu(Chiba Inst. of Tech.) |
| Assistant | Osamu Watanabe(Takushoku Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Signal Processing |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Study of Digital Multiplier Algorithms Using a Square Law Its FPGA implementation |
| Sub Title (in English) | |
| Keyword(1) | |
| 1st Author's Name | Shu Sasaki |
| 1st Author's Affiliation | Gunma University(Gunma Univ.) |
| 2nd Author's Name | Haruo Kobayashi |
| 2nd Author's Affiliation | Gunma University(Gunma Univ.) |
| Date | 2016-08-25 |
| Paper # | SIP2016-75 |
| Volume (vol) | vol.116 |
| Number (no) | SIP-196 |
| Page | pp.pp.17-22(SIP), |
| #Pages | 6 |
| Date of Issue | 2016-08-18 (SIP) |