Presentation 2016-08-08
Efficient implementation method of a compact HTM into processor cores
Takahiro Sakurada, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # CPSY2016-13
Date of Issue 2016-08-01 (CPSY)

Conference Information
Committee CPSY / DC / IPSJ-ARC
Conference Date 2016/8/8(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kissei-Bunka-Hall (Matsumoto)
Topics (in Japanese) (See Japanese page)
Topics (in English) Parallel, Distributed and Cooperative Processing
Chair Yasuhiko Nakashima(NAIST) / Michiko Inoue(NAIST)
Vice Chair Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Secretary Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Satoshi Fukumoto(Kyoto Sangyo Univ.) / (Tokyo Inst. of Tech.)
Assistant Takeshi Ohkawa(Utsunomiya Univ.) / Shinya Takameda(NAIST)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Efficient implementation method of a compact HTM into processor cores
Sub Title (in English)
Keyword(1)
1st Author's Name Takahiro Sakurada
1st Author's Affiliation Mie Univercity(Mie Univ.)
2nd Author's Name Takahiro Sasaki
2nd Author's Affiliation Mie Univercity(Mie Univ.)
3rd Author's Name Yuki Fukazawa
3rd Author's Affiliation Mie Univercity(Mie Univ.)
4th Author's Name Toshio Kondo
4th Author's Affiliation Mie Univercity(Mie Univ.)
Date 2016-08-08
Paper # CPSY2016-13
Volume (vol) vol.116
Number (no) CPSY-177
Page pp.pp.45-50(CPSY),
#Pages 6
Date of Issue 2016-08-01 (CPSY)