Presentation | 2016-06-16 A method of reducing amount of operations on the bit serial multiply-accumulator and its application Daichi Okamoto, Masafumi Kondo, Yoshihiro Sejima, Tomoyuki Yokogawa, Kazutami Arimoto, Yoichiro Sato, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Although the digital hearing aids with the high functionality of digital signal processor (DSP) becomes widely used, its battery life is limited to only a few days. In order to solve this problem, we have proposed the low power bit serial multiply-accumulator (BS-MAC) by using a ring oscillator. In BS-MAC which calculates sequentially per bit, however, it was difficult to satisfy the performance for necessary of a digital filter. Therefore, we focus on unnecessary operations by zero multiplication, and improve the calculation time and power consumption by curtailing these operations in BS-MAC. In additon, we design FIR filter as an application of the BS-MAC, and confirm its operation through implementation on FPGA. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | digital hearing aid / bit serial / ring oscillator / low power consumption / FIR filter |
Paper # | CAS2016-7,VLD2016-13,SIP2016-41,MSS2016-7 |
Date of Issue | 2016-06-09 (CAS, VLD, SIP, MSS) |
Conference Information | |
Committee | VLD / CAS / MSS / SIP |
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Conference Date | 2016/6/16(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Hirosaki Shiritsu Kanko-kan |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | System, signal processing and related topics |
Chair | Takashi Takenana(NEC) / Toshihiko Takahashi(Niigata Univ.) / Satoshi Yamane(Kanazawa Univ.) / Makoto Nakashizuka(Chiba Inst. of Tech.) |
Vice Chair | Hiroyuki Ochi(Ritsumeikan Univ.) / Mitsuru Hiraki(Renesas) / Morikazu Nakamura(Univ. of Ryukyus) / Masahiro Okuda(Univ. of Kitakyushu) / Shogo Muramatsu(Niigata Univ.) |
Secretary | Hiroyuki Ochi(Fujitsu Labs.) / Mitsuru Hiraki(Hiroshima City Univ.) / Morikazu Nakamura(Tohoku Univ.) / Masahiro Okuda(Renesas) / Shogo Muramatsu(Yamaguchi Univ.) |
Assistant | Parizy Matthieu(Fujitsu Labs.) / Toshihiro Tachibana(Shonan Inst. of Tech.) / Yohei Nakamura(Hitachi) / Hideki Kinjo(Okinawa Univ.) / Osamu Watanabe(Takushoku Univ.) |
Paper Information | |
Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Circuits and Systems / Technical Committee on Mathematical Systems Science and its applications / Technical Committee on Signal Processing |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A method of reducing amount of operations on the bit serial multiply-accumulator and its application |
Sub Title (in English) | |
Keyword(1) | digital hearing aid |
Keyword(2) | bit serial |
Keyword(3) | ring oscillator |
Keyword(4) | low power consumption |
Keyword(5) | FIR filter |
1st Author's Name | Daichi Okamoto |
1st Author's Affiliation | Okayama Prefectural University(Okayama Prefectural Univ.) |
2nd Author's Name | Masafumi Kondo |
2nd Author's Affiliation | Kawasaki University of Medical Welfare(Kawasaki Univ. of Medical Welfare) |
3rd Author's Name | Yoshihiro Sejima |
3rd Author's Affiliation | Okayama Prefectural University(Okayama Prefectural Univ.) |
4th Author's Name | Tomoyuki Yokogawa |
4th Author's Affiliation | Okayama Prefectural University(Okayama Prefectural Univ.) |
5th Author's Name | Kazutami Arimoto |
5th Author's Affiliation | Okayama Prefectural University(Okayama Prefectural Univ.) |
6th Author's Name | Yoichiro Sato |
6th Author's Affiliation | Okayama Prefectural University(Okayama Prefectural Univ.) |
Date | 2016-06-16 |
Paper # | CAS2016-7,VLD2016-13,SIP2016-41,MSS2016-7 |
Volume (vol) | vol.116 |
Number (no) | CAS-93,VLD-94,SIP-95,MSS-96 |
Page | pp.pp.35-40(CAS), pp.35-40(VLD), pp.35-40(SIP), pp.35-40(MSS), |
#Pages | 6 |
Date of Issue | 2016-06-09 (CAS, VLD, SIP, MSS) |