| Presentation | 2016-05-20 Interface control for III-V/Si hetero-epitaxy Keisuke Yamane, Hiroto Sekiguchi, Hiroshi Okada, Akihiro Wakahara, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper focuses a formation process of the first atomic layer on Si substrates for GaP/Si heteroepitaxy. It is clarified that surface states of vicinal Si substrates strongly affects a generation of anti-phase domains (APDs) in GaP layers. When P2-molecular-beam was irradiated on vicinal Si substrates at higher temperature (over 640°C), step-bunching with multi-atomic steps occurred, resulting in a formation of wide terraces on the substrate. In the GaP layers grown on a step-bunched Si surfece, relatively large APDs were generated. The terrace-width of the step-bunched Si surface was close to the mean width of the APD-base. Therefore, it is of particular importance that the growth starts at the temperature range that single atomic layer is kept during the P2-molecular-beam irradiation before the growth. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Si / GaP / Anti-phase domain / step-bunching |
| Paper # | ED2016-26,CPM2016-14,SDM2016-31 |
| Date of Issue | 2016-05-12 (ED, CPM, SDM) |
| Conference Information | |
| Committee | CPM / ED / SDM |
|---|---|
| Conference Date | 2016/5/19(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Shizuoka University, Hamamatsu campus (Joint Research Lab.) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | crystal growth、devices characterization , etc. |
| Chair | Satoru Noge(Numazu National College of Tech.) / Koichi Maezawa(Univ. of Toyama) / Yuzou Oono(Univ. of Tsukuba) |
| Vice Chair | Fumihiko Hirose(Yamagata Univ.) / Kunio Tsuda(Toshiba) / Tatsuya Kunikiyo(Renesas) |
| Secretary | Fumihiko Hirose(NTT) / Kunio Tsuda(Nihon Univ.) / Tatsuya Kunikiyo(NEC) |
| Assistant | Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) / Manabu Arai(New JRC) / Masataka Higashiwaki(NICT) / Tadashi Yamaguchi(Renesas) |
| Paper Information | |
| Registration To | Technical Committee on Component Parts and Materials / Technical Committee on Electron Device / Technical Committee on Silicon Device and Materials |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Interface control for III-V/Si hetero-epitaxy |
| Sub Title (in English) | |
| Keyword(1) | Si |
| Keyword(2) | GaP |
| Keyword(3) | Anti-phase domain |
| Keyword(4) | step-bunching |
| 1st Author's Name | Keisuke Yamane |
| 1st Author's Affiliation | Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology(Toyohashi Tech.) |
| 2nd Author's Name | Hiroto Sekiguchi |
| 2nd Author's Affiliation | Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology(Toyohashi Tech.) |
| 3rd Author's Name | Hiroshi Okada |
| 3rd Author's Affiliation | Electronics-Inspired Interdisciplinary Research Institute, Toyohashi University of Technology(EIIRIS) |
| 4th Author's Name | Akihiro Wakahara |
| 4th Author's Affiliation | Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology(Toyohashi Tech.) |
| Date | 2016-05-20 |
| Paper # | ED2016-26,CPM2016-14,SDM2016-31 |
| Volume (vol) | vol.116 |
| Number (no) | ED-48,CPM-49,SDM-50 |
| Page | pp.pp.61-65(ED), pp.61-65(CPM), pp.61-65(SDM), |
| #Pages | 5 |
| Date of Issue | 2016-05-12 (ED, CPM, SDM) |