Presentation 2016-05-19
Checkpointing and Live-Migration on FPGA-based Supercomputing
Shinya Takamaeda, Vu Hoang Gia, Supasit Kajkamhaeng,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Hardware Design Framework / Checkpointing
Paper # RECONF2016-13
Date of Issue 2016-05-12 (RECONF)

Conference Information
Committee RECONF
Conference Date 2016/5/19(2days)
Place (in Japanese) (See Japanese page)
Place (in English) FUJITSU LAB.
Topics (in Japanese) (See Japanese page)
Topics (in English) Reconfigurable Systems, etc.
Chair Minoru Watanabe(Shizuoka Univ.)
Vice Chair Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.)
Secretary Masato Motomura(Toshiba) / Yuichiro Shibata(Univ. of Tsukuba)
Assistant Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan)

Paper Information
Registration To Technical Committee on Reconfigurable Systems
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Checkpointing and Live-Migration on FPGA-based Supercomputing
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Hardware Design Framework
Keyword(3) Checkpointing
1st Author's Name Shinya Takamaeda
1st Author's Affiliation Nara Institute of Science and Technology(NAIST)
2nd Author's Name Vu Hoang Gia
2nd Author's Affiliation Nara Institute of Science and Technology(NAIST)
3rd Author's Name Supasit Kajkamhaeng
3rd Author's Affiliation Nara Institute of Science and Technology(NAIST)
Date 2016-05-19
Paper # RECONF2016-13
Volume (vol) vol.116
Number (no) RECONF-53
Page pp.pp.61-66(RECONF),
#Pages 6
Date of Issue 2016-05-12 (RECONF)