Presentation 2016-05-13
A study on influence of interconnect inductance of a SiC power module on transient characteristic
Eisuke Masuda, Takaaki Ibuchi, Tsuyoshi Funaki, Hirotaka Otake, Tatsuya Miyazaki, Yasuo Kanetake, Takashi Nakamura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Fast switching operation using wide-bandgap power semiconductor devices is expected to reduce the switching loss in a converter. However, large $di/dt$ and $dv/dt$ also lead to surge and EMI(Electro-Magnetic Interference) noise by interacting with circuit parasitic inductance. It is necessary to model parasitic component in circuit or element, and to estimate their influence on transient characteristics of power devices. This report models interconnect inductance of SiC power module using Partial Element Equivalent Circuit method and evaluates its influence on transient characteristic in a DC/DC buck converter. This work also studies the effect of a snubber capacitor on the suppression of surge voltage.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Surge / EMI / Parasitic inductance / Partial Element Equivalent Circuit method / Snubber capasitor
Paper # EMCJ2016-15
Date of Issue 2016-05-06 (EMCJ)

Conference Information
Committee EMCJ
Conference Date 2016/5/13(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Hokkaido University
Topics (in Japanese) (See Japanese page)
Topics (in English) Power Electronics, EMC
Chair Hideaki Sone(Tohoku Univ.)
Vice Chair Osami Wada(Kyoto Univ.)
Secretary Osami Wada(Okayama Univ.)
Assistant Atsuhiro Takahashi(Toyota Central R&D Labs.) / Yoshiki Kayano(Akita Univ.) / Yusaku Katsube(Hitachi)

Paper Information
Registration To Technical Committee on Electromagnetic Compatibility
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A study on influence of interconnect inductance of a SiC power module on transient characteristic
Sub Title (in English)
Keyword(1) Surge
Keyword(2) EMI
Keyword(3) Parasitic inductance
Keyword(4) Partial Element Equivalent Circuit method
Keyword(5) Snubber capasitor
1st Author's Name Eisuke Masuda
1st Author's Affiliation Osaka University(Osaka Univ.)
2nd Author's Name Takaaki Ibuchi
2nd Author's Affiliation Osaka University(Osaka Univ.)
3rd Author's Name Tsuyoshi Funaki
3rd Author's Affiliation Osaka University(Osaka Univ.)
4th Author's Name Hirotaka Otake
4th Author's Affiliation ROHM Co., Ltd.(ROHM)
5th Author's Name Tatsuya Miyazaki
5th Author's Affiliation ROHM Co., Ltd.(ROHM)
6th Author's Name Yasuo Kanetake
6th Author's Affiliation ROHM Co., Ltd.(ROHM)
7th Author's Name Takashi Nakamura
7th Author's Affiliation ROHM Co., Ltd.(ROHM)
Date 2016-05-13
Paper # EMCJ2016-15
Volume (vol) vol.116
Number (no) EMCJ-26
Page pp.pp.35-40(EMCJ),
#Pages 6
Date of Issue 2016-05-06 (EMCJ)