| Presentation | 2016-05-19 Design of an FPGA Platform for Stencil Computation Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Stencil computation is widely used in scientific computations. Its processing speed is usually restricted by the external memory bandwidth. FPGAs have solve this problem by utilizing large internal memory efficiently. However, a very large design time and hardware design skills are required to implement an FPGA architecture successfully. To solve this problem, we propose an FPGA platform, designed entirely using C-like programming language called OpenCL (open computing language). According to the experimental results, we achieved 100~200 GFLOPS of processing speed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Stencil computation / iterative computation / accelerator / FPGA |
| Paper # | RECONF2016-3 |
| Date of Issue | 2016-05-12 (RECONF) |
| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2016/5/19(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | FUJITSU LAB. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Chair | Minoru Watanabe(Shizuoka Univ.) |
| Vice Chair | Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Masato Motomura(Toshiba) / Yuichiro Shibata(Univ. of Tsukuba) |
| Assistant | Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of an FPGA Platform for Stencil Computation Using OpenCL |
| Sub Title (in English) | |
| Keyword(1) | Stencil computation |
| Keyword(2) | iterative computation |
| Keyword(3) | accelerator |
| Keyword(4) | FPGA |
| 1st Author's Name | Hasitha Muthumala Waidyasooriya |
| 1st Author's Affiliation | Tohoku University(Tohoku Univ.) |
| 2nd Author's Name | Masanori Hariyama |
| 2nd Author's Affiliation | Tohoku University(Tohoku Univ.) |
| Date | 2016-05-19 |
| Paper # | RECONF2016-3 |
| Volume (vol) | vol.116 |
| Number (no) | RECONF-53 |
| Page | pp.pp.9-12(RECONF), |
| #Pages | 4 |
| Date of Issue | 2016-05-12 (RECONF) |