Presentation 2016-05-20
OpenCL-Based FPGA Platform for FDTD Computation
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuo Ohtera,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We propose a FPGA accelerator for FDTD (finite difference time domain) computation based on a pipelined architecture to solve the memory access bottleneck.Proposed architecture is designed using C language based OpenCL software. Compared to HDL (hardware description language) based design, hardware designed time has been reduced dramatically. According to the evaluation, we achieved over 100GFLOPS of processing speed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) OpenCL for FPGA, / FDTD / stencil computation / accelerator
Paper # EST2016-4
Date of Issue 2016-05-13 (EST)

Conference Information
Committee EST
Conference Date 2016/5/20(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Kikai-Shinko-Kaikan Bldg.
Topics (in Japanese) (See Japanese page)
Topics (in English) Simulation technology, etc.
Chair Tatsuya Kashiwa(Kitami Inst. of Tech.)
Vice Chair Hideaki Kimura(NTT) / Akimasa Hirata(Nagoya Inst. of Tech.) / Shinichiro Ohnuki(Nihon Univ.)
Secretary Hideaki Kimura(Tokyo Inst. of Tech.) / Akimasa Hirata(Muroran Inst. of Tech.) / Shinichiro Ohnuki
Assistant Atsushi Kezuka(ENRI) / Kenji Taguchi(Kitami Inst. of Tech.)

Paper Information
Registration To Technical Committee on Electronics Simulation Technology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) OpenCL-Based FPGA Platform for FDTD Computation
Sub Title (in English)
Keyword(1) OpenCL for FPGA,
Keyword(2) FDTD
Keyword(3) stencil computation
Keyword(4) accelerator
1st Author's Name Hasitha Muthumala Waidyasooriya
1st Author's Affiliation Tohoku University(Tohoku Univ.)
2nd Author's Name Masanori Hariyama
2nd Author's Affiliation Tohoku University(Tohoku Univ.)
3rd Author's Name Yasuo Ohtera
3rd Author's Affiliation Tohoku University(Tohoku Univ.)
Date 2016-05-20
Paper # EST2016-4
Volume (vol) vol.116
Number (no) EST-56
Page pp.pp.17-20(EST),
#Pages 4
Date of Issue 2016-05-13 (EST)