講演名 | 2016-04-14 [Invited Lecture] ReRAM reliability characterization and improvement by machine learning Tomoko Ogura Iwasaki(中大), Sheyang Ning(中大), Hiroki Yamazawa(中大), Chao Sun(中大), Shuhei Tanakamaru(中大), Ken Takeuchi(中大), |
---|---|
PDFダウンロードページ | PDFダウンロードページへ |
抄録(和) | The low voltage and fast program capability of ReRAM is very attractive for next-generation memory applications, but there also exist new reliability issues associated with the resistance switching mechanism. In this work, the variable behavior of ReRAM memory cells is studied using machine learning (ML) techniques. Prediction of two types of cell behavior are also evaluated, (i) how quickly will the cell reset in the next cycle, and (ii) how the cell will fail after endurance cycling. Furthermore, a new scheme, called Proactive Bit Redundancy, is included into the SSD controller. Here, a ML trained model predicts fail cells and replaces them by dynamic redundancy. In order to eliminate the need for extra address tables to store the failed cell locations, an Invalid Masking technique is also proposed. Based on measured results from a 50nm AlxOy ReRAM testchip, a bit error rate (BER) reduction of 2.85?~, also equivalent to an endurance improvement of 13?~, is obtained with little circuitry overhead. |
抄録(英) | The low voltage and fast program capability of ReRAM is very attractive for next-generation memory applications, but there also exist new reliability issues associated with the resistance switching mechanism. In this work, the variable behavior of ReRAM memory cells is studied using machine learning (ML) techniques. Prediction of two types of cell behavior are also evaluated, (i) how quickly will the cell reset in the next cycle, and (ii) how the cell will fail after endurance cycling. Furthermore, a new scheme, called Proactive Bit Redundancy, is included into the SSD controller. Here, a ML trained model predicts fail cells and replaces them by dynamic redundancy. In order to eliminate the need for extra address tables to store the failed cell locations, an Invalid Masking technique is also proposed. Based on measured results from a 50nm AlxOy ReRAM testchip, a bit error rate (BER) reduction of 2.85?~, also equivalent to an endurance improvement of 13?~, is obtained with little circuitry overhead. |
キーワード(和) | ReRAM / reliability / machine learning / proactive redundancy |
キーワード(英) | ReRAM / reliability / machine learning / proactive redundancy |
資料番号 | ICD2016-8 |
発行日 | 2016-04-07 (ICD) |
研究会情報 | |
研究会 | ICD |
---|---|
開催期間 | 2016/4/14(から2日開催) |
開催地(和) | 機械振興会館 |
開催地(英) | Kikai-Shinko-Kaikan Bldg. |
テーマ(和) | メモリ技術と一般 |
テーマ(英) | |
委員長氏名(和) | 藤島 実(広島大) |
委員長氏名(英) | Minoru Fujishima(Hiroshima Univ.) |
副委員長氏名(和) | 日高 秀人(ルネサス エレクトロニクス) |
副委員長氏名(英) | Hideto Hidaka(Renesas) |
幹事氏名(和) | 吉田 毅(広島大) |
幹事氏名(英) | Takeshi Yoshida(Hiroshima Univ.) |
幹事補佐氏名(和) | 高宮 真(東大) / 岩崎 裕江(NTT) / 橋本 隆(パナソニック) / 伊藤 浩之(東工大) / 範 公可(電通大) |
幹事補佐氏名(英) | Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) |
講演論文情報詳細 | |
申込み研究会 | Technical Committee on Integrated Circuits and Devices |
---|---|
本文の言語 | ENG |
タイトル(和) | |
サブタイトル(和) | |
タイトル(英) | [Invited Lecture] ReRAM reliability characterization and improvement by machine learning |
サブタイトル(和) | |
キーワード(1)(和/英) | ReRAM / ReRAM |
キーワード(2)(和/英) | reliability / reliability |
キーワード(3)(和/英) | machine learning / machine learning |
キーワード(4)(和/英) | proactive redundancy / proactive redundancy |
第 1 著者 氏名(和/英) | Tomoko Ogura Iwasaki / Tomoko Ogura Iwasaki |
第 1 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
第 2 著者 氏名(和/英) | Sheyang Ning / Sheyang Ning |
第 2 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
第 3 著者 氏名(和/英) | Hiroki Yamazawa / Hiroki Yamazawa |
第 3 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
第 4 著者 氏名(和/英) | Chao Sun / Chao Sun |
第 4 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
第 5 著者 氏名(和/英) | Shuhei Tanakamaru / Shuhei Tanakamaru |
第 5 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
第 6 著者 氏名(和/英) | Ken Takeuchi / Ken Takeuchi |
第 6 著者 所属(和/英) | Chuo University(略称:中大) Chuo University(略称:Chuo Univ.) |
発表年月日 | 2016-04-14 |
資料番号 | ICD2016-8 |
巻番号(vol) | vol.116 |
号番号(no) | ICD-3 |
ページ範囲 | pp.39-44(ICD), |
ページ数 | 6 |
発行日 | 2016-04-07 (ICD) |