| Presentation | 2016-04-14 [Invited Lecture] ReRAM reliability characterization and improvement by machine learning Tomoko Ogura Iwasaki, Sheyang Ning, Hiroki Yamazawa, Chao Sun, Shuhei Tanakamaru, Ken Takeuchi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The low voltage and fast program capability of ReRAM is very attractive for next-generation memory applications, but there also exist new reliability issues associated with the resistance switching mechanism. In this work, the variable behavior of ReRAM memory cells is studied using machine learning (ML) techniques. Prediction of two types of cell behavior are also evaluated, (i) how quickly will the cell reset in the next cycle, and (ii) how the cell will fail after endurance cycling. Furthermore, a new scheme, called Proactive Bit Redundancy, is included into the SSD controller. Here, a ML trained model predicts fail cells and replaces them by dynamic redundancy. In order to eliminate the need for extra address tables to store the failed cell locations, an Invalid Masking technique is also proposed. Based on measured results from a 50nm AlxOy ReRAM testchip, a bit error rate (BER) reduction of 2.85?~, also equivalent to an endurance improvement of 13?~, is obtained with little circuitry overhead. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ReRAM / reliability / machine learning / proactive redundancy |
| Paper # | ICD2016-8 |
| Date of Issue | 2016-04-07 (ICD) |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 2016/4/14(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Minoru Fujishima(Hiroshima Univ.) |
| Vice Chair | Hideto Hidaka(Renesas) |
| Secretary | Hideto Hidaka(Hiroshima Univ.) |
| Assistant | Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Invited Lecture] ReRAM reliability characterization and improvement by machine learning |
| Sub Title (in English) | |
| Keyword(1) | ReRAM |
| Keyword(2) | reliability |
| Keyword(3) | machine learning |
| Keyword(4) | proactive redundancy |
| 1st Author's Name | Tomoko Ogura Iwasaki |
| 1st Author's Affiliation | Chuo University(Chuo Univ.) |
| 2nd Author's Name | Sheyang Ning |
| 2nd Author's Affiliation | Chuo University(Chuo Univ.) |
| 3rd Author's Name | Hiroki Yamazawa |
| 3rd Author's Affiliation | Chuo University(Chuo Univ.) |
| 4th Author's Name | Chao Sun |
| 4th Author's Affiliation | Chuo University(Chuo Univ.) |
| 5th Author's Name | Shuhei Tanakamaru |
| 5th Author's Affiliation | Chuo University(Chuo Univ.) |
| 6th Author's Name | Ken Takeuchi |
| 6th Author's Affiliation | Chuo University(Chuo Univ.) |
| Date | 2016-04-14 |
| Paper # | ICD2016-8 |
| Volume (vol) | vol.116 |
| Number (no) | ICD-3 |
| Page | pp.pp.39-44(ICD), |
| #Pages | 6 |
| Date of Issue | 2016-04-07 (ICD) |