| Presentation | 2016-03-22 An STDP control circuit and its evaluation using a Cu-MoOx-Al resistance change memory fabricated on a Si MOSFET Kazumasa Tomizaki, Takashi Morie, Hideyuki Ando, Atsushi Fukuchi, Masashi Arita, Yasuo Takahashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With the progress of practical implementation of deep learning in neural networks, high-speed and low-power neural hardware (very-large-scale integrated circuits) that performs learning operation is being developed. The circuit architecture of such hardware is classified into digital and analog. Several digital neural integrated circuits have already been developed, and analog neural integrated circuits, which are expected to achieve higher performance, are also being developed. The most crucial issue for analog neural circuits is development of analog memory devices. Recently, as promising such devices, resistance change memory devices are actively studied, and some analog neural circuits with learning mechanisms using such devices have been reported. Spike-timing dependent plasticity (STDP) is often tried to implement as a learning rule. In this paper, we report evaluation results of analog memory characteristics of resistance change memory devices including Molybdenum oxide, design of memory control circuits implementing STDP, and experimental results of memory operation with asymmetric STDP characteristics. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | resistance change memory / neural network hardware / STDP control circuit / SET/RESET operation |
| Paper # | NC2015-70 |
| Date of Issue | 2016-03-15 (NC) |
| Conference Information | |
| Committee | MBE / NC |
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| Conference Date | 2016/3/22(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Tamagawa University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Tetsuo Kobayashi(Kyoto Univ.) / Toshimichi Saito(Hosei Univ.) |
| Vice Chair | Yutaka Fukuoka(Kogakuin Univ.) / Shigeo Sato(Tohoku Univ.) |
| Secretary | Yutaka Fukuoka(akita noken) / Shigeo Sato(Kogakuin Univ.) |
| Assistant | Takenori Oida(Kyoto Univ.) / Ryota Horie(Shibaura Inst. of Tech.) / Hiroyuki Kanbara(Tokyo Inst. of Tech.) / Hisanao Akima(Tohoku Univ.) |
| Paper Information | |
| Registration To | Technical Committee on ME and Bio Cybernetics / Technical Committee on Neurocomputing |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An STDP control circuit and its evaluation using a Cu-MoOx-Al resistance change memory fabricated on a Si MOSFET |
| Sub Title (in English) | |
| Keyword(1) | resistance change memory |
| Keyword(2) | neural network hardware |
| Keyword(3) | STDP control circuit |
| Keyword(4) | SET/RESET operation |
| 1st Author's Name | Kazumasa Tomizaki |
| 1st Author's Affiliation | Kyushu Institute of Technology(Kyushu Inst. Tech.) |
| 2nd Author's Name | Takashi Morie |
| 2nd Author's Affiliation | Kyushu Institute of Technology(Kyushu Inst. Tech.) |
| 3rd Author's Name | Hideyuki Ando |
| 3rd Author's Affiliation | Kyushu Institute of Technology(Kyushu Inst. Tech.) |
| 4th Author's Name | Atsushi Fukuchi |
| 4th Author's Affiliation | Hokkaido University(Hokkaido Univ.) |
| 5th Author's Name | Masashi Arita |
| 5th Author's Affiliation | Hokkaido University(Hokkaido Univ.) |
| 6th Author's Name | Yasuo Takahashi |
| 6th Author's Affiliation | Hokkaido University(Hokkaido Univ.) |
| Date | 2016-03-22 |
| Paper # | NC2015-70 |
| Volume (vol) | vol.115 |
| Number (no) | NC-514 |
| Page | pp.pp.7-12(NC), |
| #Pages | 6 |
| Date of Issue | 2016-03-15 (NC) |