Presentation 2016-03-25
A consideration on variation correction for fail prediction in LSI test
Ryo Ogawa, Yoshiyuki Nakamura, Michiko Inoue,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Recently, a test cost reduction using data mining has been attracted. It is expected to reduce the cost by predicting failing LSIs in later test processes using result of earlier test processes. However measured values in test processes have variation caused by the manufacturing and measurements themselves. Therefore, it is difficult to predict tests results without correction. In this paper, we propose variation correction method that corrects variations among package-lots, testers, and tester-sites respectively. We also propose a method to evaluate the effectiveness of correction and show that the proposed correction method is effective. Finally, we will consider how the proposed correction method is effective to fail prediction during LSI testing.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) data mining / burn-in test / LSI test / variation correction / outlier analysis
Paper # CPSY2015-158,DC2015-112
Date of Issue 2016-03-17 (CPSY, DC)

Conference Information
Committee CPSY / DC / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2016/3/24(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Fukue Bunka Hall/Rodou Fukushi Center
Topics (in Japanese) (See Japanese page)
Topics (in English) ETNET2016
Chair Yasuhiko Nakashima(NAIST) / Nobuyasu Kanekawa(Hitachi) / Masahiro Fukui(Ritsumeikan Univ.)
Vice Chair Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Michiko Inoue(NAIST)
Secretary Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Michiko Inoue(RTRI) / (Kyoto Sangyo Univ.) / (Sharp) / (Kitakyushu City Univ.)
Assistant Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A consideration on variation correction for fail prediction in LSI test
Sub Title (in English)
Keyword(1) data mining
Keyword(2) burn-in test
Keyword(3) LSI test
Keyword(4) variation correction
Keyword(5) outlier analysis
1st Author's Name Ryo Ogawa
1st Author's Affiliation Nara Institute of Science and Technology(NAIST)
2nd Author's Name Yoshiyuki Nakamura
2nd Author's Affiliation Renesas Semiconductor Package & Test Solutions(Renesas Semiconductor Package & Test Solutions)
3rd Author's Name Michiko Inoue
3rd Author's Affiliation Nara Institute of Science and Technology(NAIST)
Date 2016-03-25
Paper # CPSY2015-158,DC2015-112
Volume (vol) vol.115
Number (no) CPSY-518,DC-519
Page pp.pp.271-276(CPSY), pp.271-276(DC),
#Pages 6
Date of Issue 2016-03-17 (CPSY, DC)