| Presentation | 2016-03-25 An Effective Virtual Channel Allocation Method for Deterministic Deadlock-free Routing Ryuta Kawano, Hiroshi Nakahara, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Distributed routing methods with small routing tables are scalable design on irregular networks for large-scale High Performance Computing (HPC) systems. Recently proposed compact routing methods, however, do not guarantee deadlock-freeness due to cycle dependencies. In this report, we propose a new method to assign virtual channels for each traffic. Infiniband technologies enable routers to switch virtual channels locally from an input port to an output port. Experimental results show that by using our VC assignment method we can reduce the average number of needed VCs by up to 63%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | High-performance computing (HPC) / network topology / interconnection networks |
| Paper # | CPSY2015-148,DC2015-102 |
| Date of Issue | 2016-03-17 (CPSY, DC) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2016/3/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Fukue Bunka Hall/Rodou Fukushi Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | ETNET2016 |
| Chair | Yasuhiko Nakashima(NAIST) / Nobuyasu Kanekawa(Hitachi) / Masahiro Fukui(Ritsumeikan Univ.) |
| Vice Chair | Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Michiko Inoue(NAIST) |
| Secretary | Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Michiko Inoue(RTRI) / (Kyoto Sangyo Univ.) / (Sharp) / (Kitakyushu City Univ.) |
| Assistant | Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Effective Virtual Channel Allocation Method for Deterministic Deadlock-free Routing |
| Sub Title (in English) | |
| Keyword(1) | High-performance computing (HPC) |
| Keyword(2) | network topology |
| Keyword(3) | interconnection networks |
| 1st Author's Name | Ryuta Kawano |
| 1st Author's Affiliation | Keio University(Keio Univ.) |
| 2nd Author's Name | Hiroshi Nakahara |
| 2nd Author's Affiliation | Keio University(Keio Univ.) |
| 3rd Author's Name | Ikki Fujiwara |
| 3rd Author's Affiliation | National Institute of Informatics(NII) |
| 4th Author's Name | Hiroki Matsutani |
| 4th Author's Affiliation | Keio University(Keio Univ.) |
| 5th Author's Name | Hideharu Amano |
| 5th Author's Affiliation | Keio University(Keio Univ.) |
| 6th Author's Name | Michihiro Koibuchi |
| 6th Author's Affiliation | National Institute of Informatics(NII) |
| Date | 2016-03-25 |
| Paper # | CPSY2015-148,DC2015-102 |
| Volume (vol) | vol.115 |
| Number (no) | CPSY-518,DC-519 |
| Page | pp.pp.163-168(CPSY), pp.163-168(DC), |
| #Pages | 6 |
| Date of Issue | 2016-03-17 (CPSY, DC) |