Presentation | 2016-01-21 Yield evaluation of 40k gate-scale adiabatic-quantum-flux-parametron circuits Tatsuya Narama, Naoki Takeuchi, Thomas Ortlepp, Yuki Yamanashi, Nobuyuki Yoshikawa, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We are studying adiabatic quantum flux parametron (AQFP) circuit, which is very energy-efficient superconductor logic. Recently, we evaluated circuit yields of 10k-gate AQFP circuit using AIST STP2. In this study, we evaluated circuit yields using a large-scale AQFP circuit composed of as many as 40,000 AQFP gates with approximately 80,000 Josephson junctions, which was fabricated using AIST HSTP. We measured 6 chips using bipolar excitation currents, which were necessary to precisely evaluate circuit yields. We iterated the measurement with temperature cycling between room temperature and 4.2 K in the liquid helium, and we confirmed 37% of AND block yield. Furthermore, we confirmed high reproducibility of the measurement. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Superconductive Integrated Circuit / Adiabatic Quantum-Flux-Parametron / Flux Trapping / Circuit Yield |
Paper # | SCE2015-42 |
Date of Issue | 2016-01-14 (SCE) |
Conference Information | |
Committee | SCE |
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Conference Date | 2016/1/21(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | Nobuyuki Yoshikawa(Yokohama National Univ.) |
Vice Chair | |
Secretary | (Yokohama National Univ.) |
Assistant | Hiroyuki Akaike(Nagoya Univ.) |
Paper Information | |
Registration To | Technical Committee on Superconductive Electronics |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Yield evaluation of 40k gate-scale adiabatic-quantum-flux-parametron circuits |
Sub Title (in English) | |
Keyword(1) | Superconductive Integrated Circuit |
Keyword(2) | Adiabatic Quantum-Flux-Parametron |
Keyword(3) | Flux Trapping |
Keyword(4) | Circuit Yield |
1st Author's Name | Tatsuya Narama |
1st Author's Affiliation | Yokohama National University(Yokohama National Univ.) |
2nd Author's Name | Naoki Takeuchi |
2nd Author's Affiliation | Yokohama National University(Yokohama National Univ.) |
3rd Author's Name | Thomas Ortlepp |
3rd Author's Affiliation | CiS Forschungsinstitut für Mikrosensorik GmbH(CiS) |
4th Author's Name | Yuki Yamanashi |
4th Author's Affiliation | Yokohama National University(Yokohama National Univ.) |
5th Author's Name | Nobuyuki Yoshikawa |
5th Author's Affiliation | Yokohama National University(Yokohama National Univ.) |
Date | 2016-01-21 |
Paper # | SCE2015-42 |
Volume (vol) | vol.115 |
Number (no) | SCE-412 |
Page | pp.pp.35-40(SCE), |
#Pages | 6 |
Date of Issue | 2016-01-14 (SCE) |