Presentation 2016-01-21
Evaluation of various memory cells designed for SFQ mask ROM
Kazunao Sawada, Tomoki Watanabe, Hiroshi Shimada, Yoshinao Mizugaki,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We developed memory cells for an SFQ mask ROM that will be implemented with an SFQ-D/A converter, a candidate of next-generation AC voltage standards. The area occupancy of the SFQ mask ROM is required to be small enough for implementation on the same chip with the SFQ-D/A converter. We had first designed and tested SFQ ROM cells using an existing library. Although they worked correctly, we found that the cell sizes were large, not acceptable for high-density integration. Hence, we developed small ROM cells dedicated for the SFQ mask ROM. The cell areas are 65% reduced by eliminating verbose elements and unused spaces. We have measured test circuits fabricated using a Nb integration technology, and confirmed that the bias margins are almost the same magnitude as the simulation results.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Mask ROM / Single Flux Quantum / Josephson effect / Superconducting integrated circuits / NbAlO2/Nb
Paper # SCE2015-40
Date of Issue 2016-01-14 (SCE)

Conference Information
Committee SCE
Conference Date 2016/1/21(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Nobuyuki Yoshikawa(Yokohama National Univ.)
Vice Chair
Secretary (Yokohama National Univ.)
Assistant Hiroyuki Akaike(Nagoya Univ.)

Paper Information
Registration To Technical Committee on Superconductive Electronics
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of various memory cells designed for SFQ mask ROM
Sub Title (in English)
Keyword(1) Mask ROM
Keyword(2) Single Flux Quantum
Keyword(3) Josephson effect
Keyword(4) Superconducting integrated circuits
Keyword(5) NbAlO2/Nb
1st Author's Name Kazunao Sawada
1st Author's Affiliation University of Electro-Communications(UEC)
2nd Author's Name Tomoki Watanabe
2nd Author's Affiliation University of Electro-Communications(UEC)
3rd Author's Name Hiroshi Shimada
3rd Author's Affiliation University of Electro-Communications/Japan Science and Technology Agency(UEC/JST)
4th Author's Name Yoshinao Mizugaki
4th Author's Affiliation University of Electro-Communications/Japan Science and Technology Agency(UEC/JST)
Date 2016-01-21
Paper # SCE2015-40
Volume (vol) vol.115
Number (no) SCE-412
Page pp.pp.23-28(SCE),
#Pages 6
Date of Issue 2016-01-14 (SCE)