| Presentation | 2016-01-28 Off-Chip Learning Algorithm for Hardware Hand-Sign Recognition System Masayuki Tamaki, Hikawa Hiroomi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper discusses a new off-chip learning algorithm for hardware hand sign recognition system. The hand signrecognition system consists of a feature vector extraction and a classification network. The classifier network consists of aSOM and a Hebbian (SOM-Hebb) hybrid network. The hardware hand-sign recognition system is implemented on a fieldprogrammable gate array (FPGA), which is connected to a CMOS camera. The hardware can perform the recognition at aspeed of 60 fps. The recognition algorithm is very robust against the location change of hand signs, but it is not immune torotation or scaling, which degrades recognition performance. In the previous work, it was demonstrated that its recognitionperformance was improved by additive perturbation to the training data for the SOM-Hebb classifier. However, users have toadd perturbation because the training of the system is carried out by off-chip learning that uses feature vectors. In this paper, additive perturbation to the feature vector, which is equivalent to scale perturbation to input image, is proposed, and a newoff-chip learning that adds the perturbation, is developed. The feasibility of the system is verified by experiments against 24patterns of American sign language (ASL). The experimental results show that the system can run at 94.3% of recognitionrate. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Hand Sign Recognition / Off-Chip Learning / pattern recognition / VHDL, / FPGA |
| Paper # | NC2015-57 |
| Date of Issue | 2016-01-21 (NC) |
| Conference Information | |
| Committee | NC / NLP |
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| Conference Date | 2016/1/28(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kyushu Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Implementation of Neuro Computing,Analysis and Modeling of Human Science, etc |
| Chair | Toshimichi Saito(Hosei Univ.) / Kenya Jinno(Nippon Inst. of Tech.) |
| Vice Chair | Shigeo Sato(Tohoku Univ.) / Naoto Fujisaka(Hiroshima City Univ.) |
| Secretary | Shigeo Sato(Kyushu Inst. of Tech.) / Naoto Fujisaka(Kyoto Sangyo Univ.) |
| Assistant | Hiroyuki Kanbara(Tokyo Inst. of Tech.) / Hisanao Akima(Tohoku Univ.) / Hidehiro Nakano(Tokyo City Univ.) / Hiroyuki Asahara(Okayama Univ. of Science) |
| Paper Information | |
| Registration To | Technical Committee on Neurocomputing / Technical Committee on Nonlinear Problems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Off-Chip Learning Algorithm for Hardware Hand-Sign Recognition System |
| Sub Title (in English) | |
| Keyword(1) | Hand Sign Recognition |
| Keyword(2) | Off-Chip Learning |
| Keyword(3) | pattern recognition |
| Keyword(4) | VHDL, |
| Keyword(5) | FPGA |
| 1st Author's Name | Masayuki Tamaki |
| 1st Author's Affiliation | Kansai University(Kansai Univ) |
| 2nd Author's Name | Hikawa Hiroomi |
| 2nd Author's Affiliation | Kansai University(Kansai Univ) |
| Date | 2016-01-28 |
| Paper # | NC2015-57 |
| Volume (vol) | vol.115 |
| Number (no) | NC-426 |
| Page | pp.pp.7-12(NC), |
| #Pages | 6 |
| Date of Issue | 2016-01-21 (NC) |