| Presentation | 2016-01-21 FPGA Implementation of a Peak Detection System using AMPD Algorithm Fumihiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Peak detection of time-series data is widely used in various applications. A demand for implementation of low-latency and non-storing real-time peak detection has been increasing, reflecting recent technical trends such as big-data analysis and the Internet of things (IoT). This paper presents hardware architecture and FPGA implementation of a real-time and low-latency peak detection mechanism based on the automatic multi-scale based peak detection (AMPD) method, which is an algorithms of peak detection with multi-scale windows for quasi-periodic input signals. Empirical experiments show the algorithm can be efficiently implemented on a small FPGA with a good detection accuracy, depending on a relationship between a frequency of the input signal and a sampling rate. Peak detection of time-series data is widely used in various applications. A demand for implementation of low-latency and non-storing real-time peak detection has been increasing, reflecting recent technical trends such as big-data analysis and the Internet of things (IoT). This paper presents hardware architecture and FPGA implementation of a real-time and low-latency peak detection mechanism based on the automatic multi-scale based peak detection (AMPD) method,which is an algorithms of peak detection with multi-scale windows for quasi-periodic input signals. Empirical experiments show the algorithm can be efficiently implemented on a small FPGA with a good detection accuracy, depending on a relationship between a frequency of the input signal and a sampling rate. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Peak Detection / Multi Scale |
| Paper # | VLD2015-100,CPSY2015-132,RECONF2015-82 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | VLD / CPSY / RECONF / IPSJ-SLDM / IPSJ-ARC |
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| Conference Date | 2016/1/19(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Chair | Yusuke Matsunaga(Kyushu Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Masahiro Fukui(Ritsumeikan Univ.) / Masahiro Goshima(国情研) |
| Vice Chair | Takashi Takenana(NEC) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Takashi Takenana(Ritsumeikan Univ.) / Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(Fujitsu Labs.) / Masato Motomura(NII) / Yuichiro Shibata(Toshiba) / (Univ. of Tsukuba) / (Sharp) |
| Assistant | Ittetsu Taniguchi(Ritsumeikan Univ.) / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Special Interest Group on System and LSI Design Methodology / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of a Peak Detection System using AMPD Algorithm |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Peak Detection |
| Keyword(3) | Multi Scale |
| 1st Author's Name | Fumihiko Iwasaki |
| 1st Author's Affiliation | Nagasaki University(Nagasaki Univ) |
| 2nd Author's Name | Yuichiro Shibata |
| 2nd Author's Affiliation | Nagasaki University(Nagasaki Univ) |
| 3rd Author's Name | Kiyoshi Oguri |
| 3rd Author's Affiliation | Nagasaki University(Nagasaki Univ) |
| Date | 2016-01-21 |
| Paper # | VLD2015-100,CPSY2015-132,RECONF2015-82 |
| Volume (vol) | vol.115 |
| Number (no) | VLD-398,CPSY-399,RECONF-400 |
| Page | pp.pp.179-184(VLD), pp.179-184(CPSY), pp.179-184(RECONF), |
| #Pages | 6 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |