| Presentation | 2016-01-20 Implementation and evaluation of Dynamic Multi-Vth methodology in Silicon-on-Thin-BOX Shohei Io, Hanano Suzuki, Shohei Nakamura, Kimiyoshi Usami, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Silicon-on-Thin-BOX is one of the FD-SOI devices. It operates at ultra-low voltage and it is possible to effectively change the threshold voltage of the transistor by body biasing. So far, a design technique that realizes multi-Vth using body biasing has been proposed. After designing the circuit which consists of only low threshold transistors, the threshold voltage is raised dynamically at the area which does not need high-speed operation by applying body biasing. In this paper, we propose a new layout design approach and demonstrate effectiveness through implementation and real chip evaluation in 65nm SOTB process. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Silicon-on-Thin-BOX / Body Bias / Multi Vth |
| Paper # | VLD2015-88,CPSY2015-120,RECONF2015-70 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | VLD / CPSY / RECONF / IPSJ-SLDM / IPSJ-ARC |
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| Conference Date | 2016/1/19(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Chair | Yusuke Matsunaga(Kyushu Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Masahiro Fukui(Ritsumeikan Univ.) / Masahiro Goshima(国情研) |
| Vice Chair | Takashi Takenana(NEC) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Takashi Takenana(Ritsumeikan Univ.) / Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(Fujitsu Labs.) / Masato Motomura(NII) / Yuichiro Shibata(Toshiba) / (Univ. of Tsukuba) / (Sharp) |
| Assistant | Ittetsu Taniguchi(Ritsumeikan Univ.) / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Special Interest Group on System and LSI Design Methodology / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and evaluation of Dynamic Multi-Vth methodology in Silicon-on-Thin-BOX |
| Sub Title (in English) | |
| Keyword(1) | Silicon-on-Thin-BOX |
| Keyword(2) | Body Bias |
| Keyword(3) | Multi Vth |
| 1st Author's Name | Shohei Io |
| 1st Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| 2nd Author's Name | Hanano Suzuki |
| 2nd Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| 3rd Author's Name | Shohei Nakamura |
| 3rd Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| 4th Author's Name | Kimiyoshi Usami |
| 4th Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| Date | 2016-01-20 |
| Paper # | VLD2015-88,CPSY2015-120,RECONF2015-70 |
| Volume (vol) | vol.115 |
| Number (no) | VLD-398,CPSY-399,RECONF-400 |
| Page | pp.pp.91-96(VLD), pp.91-96(CPSY), pp.91-96(RECONF), |
| #Pages | 6 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |