| Presentation | 2016-01-20 A Chip Evaluation of the Heat Generation in 3D stacked LSI Tatsuya Wada, Kimiyosi Usami, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Heat is one of the problems in the three-dimensional stacking technology of LSI. We have developed a three-dimensional stacked chip equipped with the heat generation circuit and the temperature monitor circuit, to evaluate the effect of the heat generated in the chip by the stacked structure. By stack number is four stages from three-stage, temperature around the heating circuit by 0.56 watts consumed at the center of the uppermost stage is raised 1.7 degrees Celsius, and by 0.40 watts consumed at the corner of the uppermost stage is raised 6.5 degrees Celsius. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 3D stacked LSI / Thermal Monitor / heating |
| Paper # | VLD2015-87,CPSY2015-119,RECONF2015-69 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | VLD / CPSY / RECONF / IPSJ-SLDM / IPSJ-ARC |
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| Conference Date | 2016/1/19(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Chair | Yusuke Matsunaga(Kyushu Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Masahiro Fukui(Ritsumeikan Univ.) / Masahiro Goshima(国情研) |
| Vice Chair | Takashi Takenana(NEC) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Takashi Takenana(Ritsumeikan Univ.) / Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(Fujitsu Labs.) / Masato Motomura(NII) / Yuichiro Shibata(Toshiba) / (Univ. of Tsukuba) / (Sharp) |
| Assistant | Ittetsu Taniguchi(Ritsumeikan Univ.) / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Special Interest Group on System and LSI Design Methodology / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Chip Evaluation of the Heat Generation in 3D stacked LSI |
| Sub Title (in English) | |
| Keyword(1) | 3D stacked LSI |
| Keyword(2) | Thermal Monitor |
| Keyword(3) | heating |
| Keyword(4) | |
| 1st Author's Name | Tatsuya Wada |
| 1st Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| 2nd Author's Name | Kimiyosi Usami |
| 2nd Author's Affiliation | Shibaura Institute of Technology(Shibaura IT) |
| Date | 2016-01-20 |
| Paper # | VLD2015-87,CPSY2015-119,RECONF2015-69 |
| Volume (vol) | vol.115 |
| Number (no) | VLD-398,CPSY-399,RECONF-400 |
| Page | pp.pp.85-90(VLD), pp.85-90(CPSY), pp.85-90(RECONF), |
| #Pages | 6 |
| Date of Issue | 2016-01-12 (VLD, CPSY, RECONF) |