| Presentation | 2015-12-17 [Poster Presentation] Performance Evaluation of Solid-State-Drives (SSDs) by Considering the effect of Error-correcting code Yusuke Yamaga, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In the NAND flash memory based solid-state drives (SSDs), reliability is guaranteed by error correcting code (ECC). Conventional ECCs, which has higher error correction capability, causes performance degradation due to the longer ECC decoding time. Since in-place overwriting is prohibited in NAND flash, multiple read operations are required during the write in valid pages and reclaiming the free space. As a result, ECC decoding time is increased due to the frequently read operations. In this paper, the relation between performance and reliability is investigated for conventional ECCs by utilizing the SSD simulator. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | NAND flash memory / Solid-State-Drives (SSDs) / Error correction code (ECC) |
| Paper # | ICD2015-71,CPSY2015-84 |
| Date of Issue | 2015-12-10 (ICD, CPSY) |
| Conference Information | |
| Committee | ICD / CPSY |
|---|---|
| Conference Date | 2015/12/17(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kyoto Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Minoru Fujishima(Hiroshima Univ.) / Yasuhiko Nakashima(NAIST) |
| Vice Chair | Hideto Hidaka(Renesas) / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) |
| Secretary | Hideto Hidaka(Hiroshima Univ.) / Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) |
| Assistant | Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Computer Systems |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Poster Presentation] Performance Evaluation of Solid-State-Drives (SSDs) by Considering the effect of Error-correcting code |
| Sub Title (in English) | |
| Keyword(1) | NAND flash memory |
| Keyword(2) | Solid-State-Drives (SSDs) |
| Keyword(3) | Error correction code (ECC) |
| 1st Author's Name | Yusuke Yamaga |
| 1st Author's Affiliation | Chuo University(Chuo Univ.) |
| 2nd Author's Name | Tsukasa Tokutomi |
| 2nd Author's Affiliation | Chuo University(Chuo Univ.) |
| 3rd Author's Name | Atsuro Kobayashi |
| 3rd Author's Affiliation | Chuo University(Chuo Univ.) |
| 4th Author's Name | Ken Takeuchi |
| 4th Author's Affiliation | Chuo University(Chuo Univ.) |
| Date | 2015-12-17 |
| Paper # | ICD2015-71,CPSY2015-84 |
| Volume (vol) | vol.115 |
| Number (no) | ICD-373,CPSY-374 |
| Page | pp.pp.41-41(ICD), pp.41-41(CPSY), |
| #Pages | 1 |
| Date of Issue | 2015-12-10 (ICD, CPSY) |