Presentation 2015-12-18
FPGA Implementation of Highly Reliable Level Crossing Controller
Shinji Nagao, Youlong Chen, Hiroshi Mochizuki, Hideo Nakamura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # DC2015-83
Date of Issue 2015-12-11 (DC)

Conference Information
Committee DC
Conference Date 2015/12/18(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Kurieito Mulakami (Murakami City)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Nobuyasu Kanekawa(Hitachi)
Vice Chair Michiko Inoue(NAIST)
Secretary Michiko Inoue(RTRI)
Assistant

Paper Information
Registration To Technical Committee on Dependable Computing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) FPGA Implementation of Highly Reliable Level Crossing Controller
Sub Title (in English)
Keyword(1)
1st Author's Name Shinji Nagao
1st Author's Affiliation Nihon University(Nihon Univ.)
2nd Author's Name Youlong Chen
2nd Author's Affiliation Nihon University(Nihon Univ.)
3rd Author's Name Hiroshi Mochizuki
3rd Author's Affiliation Nihon University(Nihon Univ.)
4th Author's Name Hideo Nakamura
4th Author's Affiliation Nihon University(Nihon Univ.)
Date 2015-12-18
Paper # DC2015-83
Volume (vol) vol.115
Number (no) DC-382
Page pp.pp.53-56(DC),
#Pages 4
Date of Issue 2015-12-11 (DC)