Presentation	2015-12-14 Self-Aligned Metal Double Gate Low-Temperature Poly-Ge TFT with Thin Channel Layer on a Glass Substrate Yuya Nishimura, Akito Hara,
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Abstract(in Japanese)	(See Japanese page)
Abstract(in English)
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)
Paper #	EID2015-19,SDM2015-102
Date of Issue	2015-12-07 (EID, SDM)

Conference Information
Committee	EID / SDM
Conference Date	2015/12/14(1days)
Place (in Japanese)	(See Japanese page)
Place (in English)	Ryukoku University, Avanti Kyoto Hall
Topics (in Japanese)	(See Japanese page)
Topics (in English)	Si and Si-related Materials and Devices, and Display Technology
Chair	Tomokazu Shiga(Univ. of Electro-Comm.) / Yuzou Oono(Univ. of Tsukuba)
Vice Chair	Mutsumi Kimura(Ryukoku Univ.) / Yuko Kominami(Shizuoka Univ.) / Tatsuya Kunikiyo(Renesas)
Secretary	Mutsumi Kimura(NTT) / Yuko Kominami(Tokyo Inst. of Tech.) / Tatsuya Kunikiyo(Tohoku Univ.)
Assistant	Rumiko Yamaguchi(Akita Univ.) / Hiroyuki Nitta(Japan Display) / Mitsuru Nakata(NHK) / Takashi Kojiri(ZEON) / Ryosuke Nonaka(Toshiba) / Takeshi Okuno(Samsung) / Tadashi Yamaguchi(Renesas)

Paper Information
Registration To	Technical Committee on Electronic Information Displays / Technical Committee on Silicon Device and Materials
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Self-Aligned Metal Double Gate Low-Temperature Poly-Ge TFT with Thin Channel Layer on a Glass Substrate
Sub Title (in English)
Keyword(1)
1st Author's Name	Yuya Nishimura
1st Author's Affiliation	Tohoku Gakuin University(Tohoku Gakuin Univ.)
2nd Author's Name	Akito Hara
2nd Author's Affiliation	Tohoku Gakuin University(Tohoku Gakuin Univ.)
Date	2015-12-14
Paper #	EID2015-19,SDM2015-102
Volume (vol)	vol.115
Number (no)	EID-362,SDM-363
Page	pp.pp.43-47(EID), pp.43-47(SDM),
#Pages	5
Date of Issue	2015-12-07 (EID, SDM)