Presentation | 2015-12-03 Logic Design of A Single-Flux-Quantum Microprocessor Koki Ishida, Tomonori Tsuhata, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | CMOS microprocessors have been facing a limitation for clock speed improvement because of increasingcomputing power. Using SFQ (Single-Flux-Quantum) devices and circuits is a promising way to solve the power wall problem. In a previous study, we have suggested proper archtecture to design SFQ microprocessor. Thispaper designs an SFQ microprocessor and assesses in terms of clock frequencies, area, and power consumption. The evaluation results show that an SFQ microprocessor clock speed passed 222Ghz and 56 times faster thanCMOS microprocessor. Moreover, the SFQ microprocessor consumes only 1/5000 of energy compared to CMOSmicroprocessor. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Microprocessor / Single-Flux-Quantum Circuit / High Performance / Low Power |
Paper # | CPSY2015-73 |
Date of Issue | 2015-11-24 (CPSY) |
Conference Information | |
Committee | VLD / DC / IPSJ-SLDM / CPSY / RECONF / ICD / CPM |
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Conference Date | 2015/12/1(3days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Nagasaki Kinro Fukushi Kaikan |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | Design Gaia 2015 -New Field of VLSI Design- |
Chair | Yusuke Matsunaga(Kyushu Univ.) / Nobuyasu Kanekawa(Hitachi) / Masahiro Fukui(Ritsumeikan Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Minoru Fujishima(Hiroshima Univ.) / Satoru Noge(Numazu National College of Tech.) |
Vice Chair | Takashi Takenana(NEC) / Michiko Inoue(NAIST) / / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Hideto Hidaka(Renesas) / Fumihiko Hirose(Yamagata Univ.) |
Secretary | Takashi Takenana(Ritsumeikan Univ.) / Michiko Inoue(Fujitsu Labs.) / (RTRI) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Sharp) / Masato Motomura(Kitakyushu City Univ.) / Yuichiro Shibata(Toshiba) / Hideto Hidaka(Fujitsu Labs.) / Fumihiko Hirose(NII) |
Assistant | Ittetsu Taniguchi(Ritsumeikan Univ.) / / / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) / Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) |
Paper Information | |
Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Component Parts and Materials |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Logic Design of A Single-Flux-Quantum Microprocessor |
Sub Title (in English) | |
Keyword(1) | Microprocessor |
Keyword(2) | Single-Flux-Quantum Circuit |
Keyword(3) | High Performance |
Keyword(4) | Low Power |
1st Author's Name | Koki Ishida |
1st Author's Affiliation | Kyushu University(Kyushu Univ.) |
2nd Author's Name | Tomonori Tsuhata |
2nd Author's Affiliation | Kyushu University(Kyushu Univ.) |
3rd Author's Name | Masamitsu Tanaka |
3rd Author's Affiliation | Nagoya University(Nagoya Univ.) |
4th Author's Name | Takatsugu Ono |
4th Author's Affiliation | Kyushu University(Kyushu Univ.) |
5th Author's Name | Koji Inoue |
5th Author's Affiliation | Kyushu University(Kyushu Univ.) |
Date | 2015-12-03 |
Paper # | CPSY2015-73 |
Volume (vol) | vol.115 |
Number (no) | CPSY-342 |
Page | pp.pp.69-74(CPSY), |
#Pages | 6 |
Date of Issue | 2015-11-24 (CPSY) |