Presentation 2015-12-03
A Handshake-delay-aware Scheduling Algorithm in High-level Synthesis for Four-phase Dual-rail Asynchronous Systems
Kohta Itani, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This report is intended to discuss the scheduling problem in high-level synthesis~(HLS) for four-phase dual-rail asynchronous systems.For a data-flow graph~(DFG) given as an input to HLS, scheduling which orders independent operations affects not only the concurrency of operations, i.e., shareability of operational units performing those operations, but also delay due to handshake that controls the start/completion of each operation. It is important to consider the whole circuit delay, i.e., latency, including handshake-delay in scheduling because it is not negligible compared with operation-delay. On the other hand, in operation chaining which is known as a technique to reduce latency, handshakes for the operations in an operation-chain are lumped together and it leads to reduce handshake-delay. It is, therefore, also important to take operation chaining into account in scheduling. On the basis of the above discussion, a heuristic algorithm is proposedto solve the latency minimization problem under resource constraints in terms of the number of operational units while considering operation chaining. Several results are shown by applying the proposed algorithm to a benchmark DFG.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Four-phase dual-rail asynchronous circuit / high-level synthesis / scheduling / handshake-delay / operation chaining
Paper # VLD2015-60,DC2015-56
Date of Issue 2015-11-24 (VLD, DC)

Conference Information
Committee VLD / DC / IPSJ-SLDM / CPSY / RECONF / ICD / CPM
Conference Date 2015/12/1(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Nagasaki Kinro Fukushi Kaikan
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2015 -New Field of VLSI Design-
Chair Yusuke Matsunaga(Kyushu Univ.) / Nobuyasu Kanekawa(Hitachi) / Masahiro Fukui(Ritsumeikan Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Minoru Fujishima(Hiroshima Univ.) / Satoru Noge(Numazu National College of Tech.)
Vice Chair Takashi Takenana(NEC) / Michiko Inoue(NAIST) / / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Hideto Hidaka(Renesas) / Fumihiko Hirose(Yamagata Univ.)
Secretary Takashi Takenana(Ritsumeikan Univ.) / Michiko Inoue(Fujitsu Labs.) / (RTRI) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Sharp) / Masato Motomura(Kitakyushu City Univ.) / Yuichiro Shibata(Toshiba) / Hideto Hidaka(Fujitsu Labs.) / Fumihiko Hirose(NII)
Assistant Ittetsu Taniguchi(Ritsumeikan Univ.) / / / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) / Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Component Parts and Materials
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Handshake-delay-aware Scheduling Algorithm in High-level Synthesis for Four-phase Dual-rail Asynchronous Systems
Sub Title (in English)
Keyword(1) Four-phase dual-rail asynchronous circuit
Keyword(2) high-level synthesis
Keyword(3) scheduling
Keyword(4) handshake-delay
Keyword(5) operation chaining
1st Author's Name Kohta Itani
1st Author's Affiliation Hiroshima City University(Hiroshima City Univ.)
2nd Author's Name Tsuyoshi Iwagaki
2nd Author's Affiliation Hiroshima City University(Hiroshima City Univ.)
3rd Author's Name Hideyuki Ichihara
3rd Author's Affiliation Hiroshima City University(Hiroshima City Univ.)
4th Author's Name Tomoo Inoue
4th Author's Affiliation Hiroshima City University(Hiroshima City Univ.)
Date 2015-12-03
Paper # VLD2015-60,DC2015-56
Volume (vol) vol.115
Number (no) VLD-338,DC-339
Page pp.pp.147-152(VLD), pp.147-152(DC),
#Pages 6
Date of Issue 2015-11-24 (VLD, DC)