Presentation 2015-12-03
Fast and Accurate Estimation of Execution Cycles for ARM Architecture
Go Sato, Yuki Ando, Hiroaki Takada, Shinya Honda, Yutaka Matsubara,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Embedded system / Processor / ARM architecture / Instruction Set Simulator(ISS) / Pipeline hazard
Paper # VLD2015-73,DC2015-69
Date of Issue 2015-11-24 (VLD, DC)

Conference Information
Committee VLD / DC / IPSJ-SLDM / CPSY / RECONF / ICD / CPM
Conference Date 2015/12/1(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Nagasaki Kinro Fukushi Kaikan
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2015 -New Field of VLSI Design-
Chair Yusuke Matsunaga(Kyushu Univ.) / Nobuyasu Kanekawa(Hitachi) / Masahiro Fukui(Ritsumeikan Univ.) / Yasuhiko Nakashima(NAIST) / Minoru Watanabe(Shizuoka Univ.) / Minoru Fujishima(Hiroshima Univ.) / Satoru Noge(Numazu National College of Tech.)
Vice Chair Takashi Takenana(NEC) / Michiko Inoue(NAIST) / / Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Hideto Hidaka(Renesas) / Fumihiko Hirose(Yamagata Univ.)
Secretary Takashi Takenana(Ritsumeikan Univ.) / Michiko Inoue(Fujitsu Labs.) / (RTRI) / Koji Nakano(Kyoto Sangyo Univ.) / Hidetsugu Irie(Sharp) / Masato Motomura(Kitakyushu City Univ.) / Yuichiro Shibata(Toshiba) / Hideto Hidaka(Fujitsu Labs.) / Fumihiko Hirose(NII)
Assistant Ittetsu Taniguchi(Ritsumeikan Univ.) / / / Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) / Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) / Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Takashi Sakamoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Component Parts and Materials
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fast and Accurate Estimation of Execution Cycles for ARM Architecture
Sub Title (in English)
Keyword(1) Embedded system
Keyword(2) Processor
Keyword(3) ARM architecture
Keyword(4) Instruction Set Simulator(ISS)
Keyword(5) Pipeline hazard
1st Author's Name Go Sato
1st Author's Affiliation Nagoya University(Nagoya Univ)
2nd Author's Name Yuki Ando
2nd Author's Affiliation Nagoya University(Nagoya Univ)
3rd Author's Name Hiroaki Takada
3rd Author's Affiliation Nagoya University(Nagoya Univ)
4th Author's Name Shinya Honda
4th Author's Affiliation Nagoya University(Nagoya Univ)
5th Author's Name Yutaka Matsubara
5th Author's Affiliation Nagoya University(Nagoya Univ)
Date 2015-12-03
Paper # VLD2015-73,DC2015-69
Volume (vol) vol.115
Number (no) VLD-338,DC-339
Page pp.pp.231-236(VLD), pp.231-236(DC),
#Pages 6
Date of Issue 2015-11-24 (VLD, DC)