| Presentation | 2015-10-26 A Design of the 178-MHz WXGA 30-fps Optical Flow Processor Based on HOE Algorithm Tetsuya Matsumura, Aoi Kurokawa, Kosuke Imamura, Yoshio Matsuda, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We propose an optical flow processor, which allows real-time processing of WXGA 30-fps at 178.3 MHz. By introducing the SOR method and a pipeline operation for the Gauss-Seidel method to the iterative flow calculation, computational complexity can be reduced to 14.5% when compared to the previous HOE processor. We decreased the area of the embedded memory by using the image division method, applying line memory, and optimizing the computation word length. The core size of the designed processor is 16.82 mm2 in 90 nm process technology, which is approximately 5% of the previous HOE processor. The processor can operate completely in parallel, which ensures high-resolution scalability. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Optical flow / HOE / Gauss-Seidel / SOR method / Processor |
| Paper # | VLD2015-32,ICD2015-45,IE2015-67 |
| Date of Issue | 2015-10-19 (VLD, ICD, IE) |
| Conference Information | |
| Committee | ICD / IE / VLD / IPSJ-SLDM |
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| Conference Date | 2015/10/26(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Minoru Fujishima(Hiroshima Univ.) / Seishi Takamura(NTT) / Yusuke Matsunaga(Kyushu Univ.) / Masahiro Fukui(Ritsumeikan Univ.) |
| Vice Chair | Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Atsuro Ichigaya(NHK) / Takashi Takenana(NEC) |
| Secretary | Hideto Hidaka(Hiroshima Univ.) / Takayuki Hamamoto(NTT) / Atsuro Ichigaya(Chiba Inst. of Tech.) / Takashi Takenana(Ritsumeikan Univ.) / (Fujitsu Labs.) |
| Assistant | Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Keita Takahashi(Nagoya Univ.) / Kei Kawamura(KDDI R&D Labs.) / Ittetsu Taniguchi(Ritsumeikan Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Technical Committee on VLSI Design Technologies / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Design of the 178-MHz WXGA 30-fps Optical Flow Processor Based on HOE Algorithm |
| Sub Title (in English) | |
| Keyword(1) | Optical flow |
| Keyword(2) | HOE |
| Keyword(3) | Gauss-Seidel |
| Keyword(4) | SOR method |
| Keyword(5) | Processor |
| 1st Author's Name | Tetsuya Matsumura |
| 1st Author's Affiliation | Nihon University(Nihon Univ.) |
| 2nd Author's Name | Aoi Kurokawa |
| 2nd Author's Affiliation | Kanazawa University(Kanazawa Univ.) |
| 3rd Author's Name | Kosuke Imamura |
| 3rd Author's Affiliation | Kanazawa University(Kanazawa Univ.) |
| 4th Author's Name | Yoshio Matsuda |
| 4th Author's Affiliation | Kanazawa University(Kanazawa Univ.) |
| Date | 2015-10-26 |
| Paper # | VLD2015-32,ICD2015-45,IE2015-67 |
| Volume (vol) | vol.115 |
| Number (no) | VLD-270,ICD-271,IE-272 |
| Page | pp.pp.31-36(VLD), pp.31-36(ICD), pp.31-36(IE), |
| #Pages | 6 |
| Date of Issue | 2015-10-19 (VLD, ICD, IE) |