| Presentation | 2015-10-29 [Invited Talk] Low-power and high-speed FPGA by adjacent integration of flash memory and CMOS logic Koichiro Zaitsu, Kosuke Tatsumura, Mari Matsumoto, Masato Oda, Shinichi Yasuda, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Novel nonvolatile programmable switch for low-power and high-speed FPGA where flash memory is adjacently integrated to CMOS logic is demonstrated. The flash memory and high-speed switching transistor are fabricated close to each other without deteriorating their respective performance. Furthermore, programming schemes to write and erase the flash memory are optimized so that the memory is successfully programmed without any damage to the switching transistors. Flash-based configuration memory in the nonvolatile programmable switch has only half the area of the conventional SRAM-based one, and it can be placed in each block in FPGA, enabling efficient power gating that offers low-power FPGA operation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / MONOS flash memory / SONOS flash memory / Low power / Nonvolatile memory |
| Paper # | SDM2015-75 |
| Date of Issue | 2015-10-22 (SDM) |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 2015/10/29(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Niche, Tohoku Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Process Science and New Process Technology |
| Chair | Yuzou Oono(Univ. of Tsukuba) |
| Vice Chair | Tatsuya Kunikiyo(Renesas) |
| Secretary | Tatsuya Kunikiyo(Tohoku Univ.) |
| Assistant | Tadashi Yamaguchi(Renesas) |
| Paper Information | |
| Registration To | Technical Committee on Silicon Device and Materials |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Invited Talk] Low-power and high-speed FPGA by adjacent integration of flash memory and CMOS logic |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | MONOS flash memory |
| Keyword(3) | SONOS flash memory |
| Keyword(4) | Low power |
| Keyword(5) | Nonvolatile memory |
| 1st Author's Name | Koichiro Zaitsu |
| 1st Author's Affiliation | Toshiba Corporatiobn(Toshiba) |
| 2nd Author's Name | Kosuke Tatsumura |
| 2nd Author's Affiliation | Toshiba Corporatiobn(Toshiba) |
| 3rd Author's Name | Mari Matsumoto |
| 3rd Author's Affiliation | Toshiba Corporatiobn(Toshiba) |
| 4th Author's Name | Masato Oda |
| 4th Author's Affiliation | Toshiba Corporatiobn(Toshiba) |
| 5th Author's Name | Shinichi Yasuda |
| 5th Author's Affiliation | Toshiba Corporatiobn(Toshiba) |
| Date | 2015-10-29 |
| Paper # | SDM2015-75 |
| Volume (vol) | vol.115 |
| Number (no) | SDM-280 |
| Page | pp.pp.23-28(SDM), |
| #Pages | 6 |
| Date of Issue | 2015-10-22 (SDM) |