| Presentation | 2015-09-18 A High-level Hardware Design Environment in Python Shinya Takamaeda, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In software development, on standard computers, there are numerous alternatives of programming languages. In contrast, there are a few alternatives of available languages in hardware development. For efficient custom hardware development, more alternatives of high productive hardware design languages are required. In this paper, we propose Veriloggen, a novel and lightweight library for describing a hardware structure in Python. We evaluated the productivity of Veriloggen by the number of lines of source code. The evaluation result shows that the current Veriloggen provides the ability to construct a hardware structure within about half number of code lines, compared to Verilog HDL. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Python / FPGA / Hardware Design Environment |
| Paper # | RECONF2015-36 |
| Date of Issue | 2015-09-11 (RECONF) |
| Conference Information | |
| Committee | RECONF |
|---|---|
| Conference Date | 2015/9/18(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Ehime University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Chair | Minoru Watanabe(Shizuoka Univ.) |
| Vice Chair | Masato Motomura(Hokkaido Univ.) / Yuichiro Shibata(Nagasaki Univ.) |
| Secretary | Masato Motomura(Toshiba) / Yuichiro Shibata(Univ. of Tsukuba) |
| Assistant | Kazuya Tanikagawa(Hiroshima City Univ.) / Takefumi Miyoshi(e-trees.Japan) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A High-level Hardware Design Environment in Python |
| Sub Title (in English) | |
| Keyword(1) | Python |
| Keyword(2) | FPGA |
| Keyword(3) | Hardware Design Environment |
| 1st Author's Name | Shinya Takamaeda |
| 1st Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| Date | 2015-09-18 |
| Paper # | RECONF2015-36 |
| Volume (vol) | vol.115 |
| Number (no) | RECONF-228 |
| Page | pp.pp.21-26(RECONF), |
| #Pages | 6 |
| Date of Issue | 2015-09-11 (RECONF) |