Presentation 2015-08-04
Design improvement of integrated quantum voltage noise source
Masaaki Maezawa, Takahiro Yamada, Chiharu Urano,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We present design improvement of integrated quantum voltage noise source (IQVNS) for high-performance Johnson noise thermometry systems. A main problem of our previous version of IQVNS was associated with lax synchronization with low- and high-frequency clock signals, which makes the whole system complicated and less robust. We have employed on-chip generation of low-frequency clocks by down-converting a high-frequency clock so that the whole circuit operates with a single clock. Counterflow clocking architecture has also been introduced both in chip and component block levels for achieving wider timing margins. The improved IQVNS has been fabricated by using our standard Nb-junction technology and successfully tested at low frequency.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Noise Thermometry / Thermal Metrology / Temperature Standard / Noise Standard / Josephson Junction / Superconducting Integrated Circuit / Pipeline
Paper # SCE2015-10
Date of Issue 2015-07-28 (SCE)

Conference Information
Committee SCE
Conference Date 2015/8/4(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Yokohama National Univ.
Topics (in Japanese) (See Japanese page)
Topics (in English) Signal processing technologies and their applications, etc.
Chair Nobuyuki Yoshikawa(Yokohama National Univ.)
Vice Chair
Secretary (Yokohama National Univ.)
Assistant Hiroyuki Akaike(Nagoya Univ.)

Paper Information
Registration To Technical Committee on Superconductive Electronics
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design improvement of integrated quantum voltage noise source
Sub Title (in English)
Keyword(1) Noise Thermometry
Keyword(2) Thermal Metrology
Keyword(3) Temperature Standard
Keyword(4) Noise Standard
Keyword(5) Josephson Junction
Keyword(6) Superconducting Integrated Circuit
Keyword(7) Pipeline
1st Author's Name Masaaki Maezawa
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
2nd Author's Name Takahiro Yamada
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
3rd Author's Name Chiharu Urano
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
Date 2015-08-04
Paper # SCE2015-10
Volume (vol) vol.115
Number (no) SCE-173
Page pp.pp.11-16(SCE),
#Pages 6
Date of Issue 2015-07-28 (SCE)