| Presentation | 2015-08-05 Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to effectively utilize the performance of multicore processors spreading commonly at present, it is an important issue to speed up programs by using thread-level parallelism. we have developed the automated parallel processing system for binary codes without referring to the source codes by using Valgrind, which is a dynamic binary translation framework. In this system, the overhead in the thread control when executing the generated multithreaded code can cause the performance of the system to be degraded. To solve this problem, we compare and examine some thread control methods about creation and management of threads, about assignment of threads to processors, and clarify the most efficient method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | thread level parallel processing / dynamic binary translation / automatic parallelization / runtime overhead / thread control |
| Paper # | CPSY2015-29 |
| Date of Issue | 2015-07-28 (CPSY) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-ARC |
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| Conference Date | 2015/8/4(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | B-Con Plaza (Beppu) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Parallel, Distributed and Cooperative Processing |
| Chair | Yasuhiko Nakashima(NAIST) / Nobuyasu Kanekawa(Hitachi) |
| Vice Chair | Koji Nakano(Hiroshima Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Michiko Inoue(NAIST) |
| Secretary | Koji Nakano(Fujitsu Labs.) / Hidetsugu Irie(NII) / Michiko Inoue(RTRI) / (Kyoto Sangyo Univ.) |
| Assistant | Shinya Takameda(NAIST) / Takeshi Ohkawa(Utsunomiya Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation |
| Sub Title (in English) | |
| Keyword(1) | thread level parallel processing |
| Keyword(2) | dynamic binary translation |
| Keyword(3) | automatic parallelization |
| Keyword(4) | runtime overhead |
| Keyword(5) | thread control |
| 1st Author's Name | Hiroyuki Obuchi |
| 1st Author's Affiliation | Utsunomiya University(Utsunomiya Univ.) |
| 2nd Author's Name | Kanemitsu Ootsu |
| 2nd Author's Affiliation | Utsunomiya University(Utsunomiya Univ.) |
| 3rd Author's Name | Takeshi Ohkawa |
| 3rd Author's Affiliation | Utsunomiya University(Utsunomiya Univ.) |
| 4th Author's Name | Takashi Yokota |
| 4th Author's Affiliation | Utsunomiya University(Utsunomiya Univ.) |
| Date | 2015-08-05 |
| Paper # | CPSY2015-29 |
| Volume (vol) | vol.115 |
| Number (no) | CPSY-174 |
| Page | pp.pp.155-160(CPSY), |
| #Pages | 6 |
| Date of Issue | 2015-07-28 (CPSY) |