Presentation 2015-07-21
A Circuit Implementation Technique for a Beta-A/D Converter with Unity-Gain Buffer
Fumiya Kawaguchi, Yoshihiko Horio,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) $beta$-A/D converter circuits based on the $beta$-map are robust against the fluctuations and mismatches in the constituent device characteristics, so that they are suitable for an IC implementation through advanced microfabrication semiconductor processes. The integrated $beta$-A/D converters have shown their superior characteristics such as robustness, low-power, and small area. In an ordinary binary A/D converter, a Unity-Gain Buffer (UGB) has been used to improve the conversion speed. In this paper, we propose a circuit implementation technique for a $beta$-A/D converter citcuit with UGB in order to realize a high-speed, small, and low-power A/D converter. In the circuits based on the UGBs, gain errors in the UGBs will be critical. However, a high-performance $beta$-A/D converter circuit would be possible even with such gain errors, because the $beta$-A/D converter circuit is expected to be robust to the gain of the UGB. We investigate the effects of the UGB gain on the conversion characteristics of the proposed $beta$-A/D converter circuits through SPICE and numerical simulations with C-language.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) A/D converter based on $beta$-map / Unity-gain buffer / A/D converter circuit / $beta$-transformation
Paper # NLP2015-70
Date of Issue 2015-07-14 (NLP)

Conference Information
Committee NLP
Conference Date 2015/7/21(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Bibai Onsen Yu-rinkan
Topics (in Japanese) (See Japanese page)
Topics (in English) Nonlinear Problems, etc.
Chair Kenya Jinno(Nippon Inst. of Tech.)
Vice Chair Naoto Fujisaka(Hiroshima City Univ.)
Secretary Naoto Fujisaka(Tokyo Univ. of Science)
Assistant Hidehiro Nakano(Tokyo City Univ.) / Hiroyuki Asahara(Okayama Univ. of Science)

Paper Information
Registration To Technical Committee on Nonlinear Problems
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Circuit Implementation Technique for a Beta-A/D Converter with Unity-Gain Buffer
Sub Title (in English)
Keyword(1) A/D converter based on $beta$-map
Keyword(2) Unity-gain buffer
Keyword(3) A/D converter circuit
Keyword(4) $beta$-transformation
1st Author's Name Fumiya Kawaguchi
1st Author's Affiliation Tokyo Denki University(Tokyo Denki Univ.)
2nd Author's Name Yoshihiko Horio
2nd Author's Affiliation Tokyo Denki University(Tokyo Denki Univ.)
Date 2015-07-21
Paper # NLP2015-70
Volume (vol) vol.115
Number (no) NLP-150
Page pp.pp.17-21(NLP),
#Pages 5
Date of Issue 2015-07-14 (NLP)