| Presentation | 2015-06-18 Software model checking of embedded assembly programs by symbolic execution Ryosuke Konoshita, Satoshi Yamane, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have developed a software verification system for embedded assembly programs. It dynamically generates a model by the symbolic execution, and verifies the model by a reachability analysis. Our verification system verifies a model bigger than a conventional verification system for embedded systems. We explain a method which applies the symbolic execution to assembly programs. Finally, we show verification properties through some experiments. In addition, we show that our verification system can verify larger models. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | embedded assembly program / software model checking / symbolic execution |
| Paper # | CAS2015-15,VLD2015-22,SIP2015-46,MSS2015-15 |
| Date of Issue | 2015-06-10 (CAS, VLD, SIP, MSS) |
| Conference Information | |
| Committee | MSS / CAS / SIP / VLD |
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| Conference Date | 2015/6/17(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Otaru University of Commerce |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | System, signal processing and related topics |
| Chair | Satoshi Yamane(Kanazawa Univ.) / Satoshi Tanaka(Murata) / Osamu Houshuyama(NEC) / Yusuke Matsunaga(Kyushu Univ.) |
| Vice Chair | Morikazu Nakamura(Univ. of Ryukyus) / Toshihiko Takahashi(Niigata Univ.) / Makoto Nakashizuka(Chiba Inst. of Tech.) / Masahiro Okuda(Univ. of Kitakyushu) / Takashi Takenana(NEC) |
| Secretary | Morikazu Nakamura(Yamaguchi Univ.) / Toshihiko Takahashi(Toshiba) / Makoto Nakashizuka(Hitachi) / Masahiro Okuda(Tohoku Univ.) / Takashi Takenana(NEC) |
| Assistant | Hideki Kinjo(Okinawa Univ.) / Toshihiro Tachibana(Shonan Inst. of Tech.) / Yohei Nakamura(Hitachi) / Takamichi Miyata(Chiba Inst. of Tech.) / Ittetsu Taniguchi(Ritsumeikan Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Mathematical Systems Science and its applications / Technical Committee on Circuits and Systems / Technical Committee on Signal Processing / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Software model checking of embedded assembly programs by symbolic execution |
| Sub Title (in English) | |
| Keyword(1) | embedded assembly program |
| Keyword(2) | software model checking |
| Keyword(3) | symbolic execution |
| 1st Author's Name | Ryosuke Konoshita |
| 1st Author's Affiliation | Kanazawa Uuniversity(Kanazawa Univ.) |
| 2nd Author's Name | Satoshi Yamane |
| 2nd Author's Affiliation | Kanazawa Uuniversity(Kanazawa Univ.) |
| Date | 2015-06-18 |
| Paper # | CAS2015-15,VLD2015-22,SIP2015-46,MSS2015-15 |
| Volume (vol) | vol.115 |
| Number (no) | CAS-87,VLD-88,SIP-89,MSS-90 |
| Page | pp.pp.77-81(CAS), pp.77-81(VLD), pp.77-81(SIP), pp.77-81(MSS), |
| #Pages | 5 |
| Date of Issue | 2015-06-10 (CAS, VLD, SIP, MSS) |